Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Paper format. National Examinations, December 2018 — 16-Elec-A3 Signals and Communications. Three hours, closed book (an approved Casio or Sharp calculator is permitted). Answer all 5 questions; all 5 questions are of equal value (20 marks each, 100 marks total). Candidates are urged to state any assumption made where a question admits more than one reading.
Reference texts.
Note on the Question 4 figure. The block diagram shows both summing junctions drawn as plain adders — there are no minus signs at any input — so the printed arm gains are the multipliers exactly as shown: −3/4 on the first delay output into the input adder, +1/2 on the second delay output into the same adder, and +1/2 on the first delay output feeding forward to the output adder. The consequence, developed in Question 4, is that one pole falls outside the unit circle. That is a genuine property of the printed network, and the answer below treats it as such.