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22-Elec-A4 Digital Systems and Computers: December 2013

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

  1. Question 1 K-map Minimisation and Static Hazards
  2. Question 2 Multiplexer and Decoder Implementations
  3. Question 3 Four-Output Combinational Circuit and PLD Choice
  4. Question 4 Synchronous Up/Down Counter with T Flip-Flops
  5. Question 5 Serial Communication Protocols and Framing
  6. Question 6 Memory System Sizing and Bus Widths

Start with Question 1 →

Paper format. National Exams, December 2013 — 07-Elec-A4 Digital Systems & Computers. Three hours, closed book (one approved Casio or Sharp calculator). Six questions are printed; any five constitute a complete exam and every question is worth 12 marks, with the per-part split printed in the marking scheme on page 1 (Q1 and Q5 are 3+3+3+3; Q2 is 4+4+4; Q3 and Q6 are 6+6; Q4 is 8+2+2). An excitation table for the RS/JK/T/D flip-flops and a table of 22 basic Boolean identities are supplied on the last page. All six questions are solved below, because this set is a study resource rather than a timed sitting.

Reference texts.

Notation used throughout. A prime and an overbar both denote complement: \(\overline{A}\) in the mathematics, A′ in the figures, where SVG text cannot carry an overbar. The variable order in every K-map is the order printed in the question, with the leftmost variable as the most significant bit, so minterm and maxterm indices match the question's numbering exactly.