Full-Wave Bridge Rectifier Design: 04-BS-4, May 2013, Q6

Question 6 (Problem 6): Full-Wave Bridge Rectifier Design (equal value)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. AC source: 12 V_RMS, 60 Hz. Each diode has a forward offset (drop) of 0.6 V. Filter-load values: $R_{load}=1000\ \Omega$, $C=8\ \mu\text{F}$ (part b); $R=100\ \Omega$ for the low-pass filter (part c).

Find. (a) bridge schematic + conduction pattern; (b) output waveform with an RC smoothing/reservoir load; (c) the capacitor value giving 20 dB attenuation at 120 Hz relative to DC gain.

a) Schematic and conduction pattern. A full-wave bridge uses four diodes arranged so that both half-cycles of the AC input drive current through the load in the same direction:

Full-wave bridge rectifier: D1–D4 route both AC half-cycles into the same DC output polarity.

When the top AC terminal is positive, current flows AC(+) → D1 → +DC rail → load → −DC rail → D4 → AC(−): D1 and D4 conduct. When the bottom AC terminal is positive (the other half-cycle), current flows the other AC terminal → D2 → +DC rail → load → −DC rail → D3 → back to the source: D2 and D3 conduct. Two diodes are always in the conducting path in series, so the output peak is reduced by two diode drops.

Input vin(t) (dashed) and unfiltered rectifier output vout(t) (solid): both half-cycles of the input appear as positive humps at twice the line frequency (120 Hz ripple frequency), clipped to zero whenever |vin| < 2×0.6 V.

Peak output (no filter capacitor). $$V_{ac,peak} = \sqrt2\,(12) = 16.97\ \text{V}$$ $$V_{out,peak} = V_{ac,peak} - 2(0.6) = 16.97-1.2 = \boxed{15.77\ \text{V}}$$ (two diodes conduct in series at every instant, per the conduction pattern above.)

b) Output with a 1000 Ω ∥ 8 μF reservoir load. Between successive peaks the capacitor can only discharge through $R_{load}$, decaying as $v(t)=V_{out,peak}\,e^{-t/R_{load}C}$; the bridge recharges it every half-period ($T_{ripple}=1/(2f)=8.33$ ms for a full-wave rectifier).

Discharge over one ripple interval. $$R_{load}C = (1000)(8\times10^{-6}) = 8\ \text{ms}, \qquad T_{ripple}=\dfrac{1}{2(60)}=8.33\ \text{ms}$$ $$V_{min} = V_{out,peak}\,e^{-T_{ripple}/R_{load}C} = 15.77\,e^{-8.33/8} = 5.56\ \text{V}$$
Peak-to-peak ripple. $$V_{ripple} = V_{out,peak}-V_{min} = 15.77-5.56 = \boxed{10.2\ \text{V}}$$

Check: because $R_{load}C=8$ ms is comparable to (not much larger than) the 8.33 ms ripple period, the small-ripple linear approximation ($V_r\approx V_{peak}/(fR_{load}C)$) is not valid here — it would predict an impossible 16.4 V of ripple. The exact exponential-discharge calculation above is used instead, which is the correct method whenever $R_{load}C$ is not much greater than the ripple period.

c) RC low-pass filter, 20 dB attenuation of the 120 Hz ripple relative to DC. An RC low-pass has gain $|H(j\omega)|=1/\sqrt{1+(\omega RC)^2}$ relative to its DC gain of 1. Twenty decibels of attenuation means the gain must fall to $10^{-20/20}=1/10$ of the DC value.

Set up the attenuation condition. $$20\log_{10}\dfrac{1}{\sqrt{1+(\omega RC)^2}} = -20\ \text{dB} \quad\Rightarrow\quad \sqrt{1+(\omega RC)^2}=10 \quad\Rightarrow\quad \omega RC = \sqrt{99}=9.95$$
Solve for C at $\omega=2\pi(120)=754.0$ rad/s and $R=100\ \Omega$: $$C = \dfrac{9.95}{\omega R} = \dfrac{9.95}{(754.0)(100)} = \boxed{132\ \mu\text{F}}$$

Problem 6 — final results
Quantity	Value
Conducting pair, top-AC-terminal-positive half cycle	D1 & D4
Conducting pair, other half cycle	D2 & D3
Peak output (no cap)	15.77 V
Ripple, 1000 Ω ∥ 8 μF load	≈ 10.2 V p-p
Filter C (R = 100 Ω, 20 dB @ 120 Hz)	132 μF

Topic: Diode bridge rectification and RC filtering of the resulting ripple.

Key relations: Full-wave bridge output $V_{out,peak}=\sqrt2\,V_{rms}-2V_D$ (two series diode drops); capacitor-loaded ripple via exponential discharge $v(t)=V_{peak}e^{-t/RC}$; RC low-pass attenuation in dB, $20\log_{10}\big(1/\sqrt{1+(\omega RC)^2}\big)$.

Why this works: A bridge routes both AC half-cycles through the load in the same direction because the diode orientations only ever allow current to flow one way through the load regardless of which pair is conducting; adding a reservoir capacitor lets the DC rail coast between recharges instead of dropping to zero every half-cycle; a following RC stage further smooths the remaining 120 Hz ripple by rolling off frequencies well above DC.

Common pitfall: Using the small-ripple approximation formula ($V_r\approx I_{dc}/(fC)$) outside its valid regime (it requires $R_{load}C\gg T_{ripple}$); when the capacitor discharges substantially between cycles, the exact exponential must be used instead, as flagged in the check callout above.

Source: Sadiku, Fundamentals of Electric Circuits, Ch. 4 practice problems (diode circuits); Sedra & Smith style RC filter design is equivalent and commonly cross-referenced.

Question 6 of 7: Full-Wave Bridge Rectifier Design

Question 6 (Problem 6): Full-Wave Bridge Rectifier Design (equal value)