Question 6 of 7: Half-Wave Rectifier and RC Filter Design
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
04-BS-4 Electric Circuits and Power — December 2014 national exam. 3 hours, closed book (one aid sheet permitted). Any five of the seven questions constitute a complete paper; the first five as they appear in the answer book are marked. All seven questions are solved below as a complete study resource.
Reference texts: Sadiku & Alexander, Fundamentals of Electric Circuits (6th ed.) — DC circuit analysis, Thevenin/Norton equivalents, first-order transients, AC steady-state phasors and power, magnetic circuits, diode rectifiers (Ch. 2–4, 9–11, 13); Mano & Ciletti, Digital Design — combinational logic design (Ch. 2–4), cited inline for Question 7.
Given. $R_L=50\text{ k}\Omega$, $V_s=20\text{ V}_{rms}$ at 60 Hz (ideal source, part a/b); diode on-state drop $V_D=0.6\text{ V}$ (part c); filter resistor $R_f=100\,\Omega$, target attenuation 20 dB at 60 Hz relative to the DC gain (part d).
Approach. A single diode conducts only while the source is forward-biasing it (positive half-cycle for the orientation shown), clipping the negative half-cycle entirely; peak/average follow directly from $V_{pk}=\sqrt2\,V_{rms}$ and the standard half-wave average $I_{pk}/\pi$. The filter is a first-order RC low-pass whose gain rolls off at $-20\log_{10}\sqrt{1+(\omega RC)^2}$ dB relative to its DC (0 Hz) gain of unity.
a) Schematic and waveforms. The diode D conducts only while $v_s(t)\gt 0$ (forward-biased), clamping $v_{out}$ to $v_s(t)$ during that half-cycle and to zero otherwise (reverse-biased, no current); $i_{out}(t)=v_{out}(t)/R_L$ follows the same clipped shape.
b) Peak and average load current.
$$V_{pk}=\sqrt2\,V_{rms}=\sqrt2(20)=28.28\text{ V} \qquad I_{pk}=\frac{V_{pk}}{R_L}=\frac{28.28}{50{,}000}=\boxed{0.5657\text{ mA}}$$
For a half-wave rectified sinusoid the average (DC) value is $I_{pk}/\pi$:
$$I_{avg}=\frac{I_{pk}}{\pi}=\boxed{0.1801\text{ mA}}$$
c) With diode on-state drop $V_D=0.6\text{ V}$. While conducting, $v_{out}=v_s(t)-V_D$, so the clipped output peak is reduced:
$$V_{pk,out}=V_{pk}-V_D=28.28-0.6=\boxed{27.68\text{ V}}$$
the waveform shape is otherwise identical (still clipped to zero on the reverse-biased half-cycle), only the conducting-half peak is shifted down by $0.6\text{ V}$ and the diode does not begin conducting until $v_s(t)$ exceeds $0.6\text{ V}$.
d) RC low-pass filter design. The filter's transfer function magnitude relative to its DC gain is $|H(j\omega)|=1/\sqrt{1+(\omega R_fC_f)^2}$. Requiring $20\log_{10}|H(j\omega)|=-20\text{ dB}$ at $\omega=2\pi(60)$ means $|H|=10^{-20/20}=0.1$:
$$\sqrt{1+(\omega R_fC_f)^2}=10 \ \Rightarrow\ \omega R_fC_f=\sqrt{99}=9.9499$$
$$C_f=\frac{9.9499}{(2\pi\cdot60)(100)}=\boxed{263.9\,\mu\text{F}}$$
This places the filter's corner (−3 dB) frequency at $f_c=1/(2\pi R_fC_f)=6.03\text{ Hz}$, well below the 60 Hz ripple, as expected for 20 dB of ripple attenuation.
Half-wave rectifier schematic: ideal 60 Hz, 20 Vrms source, diode D, and the 50 kΩ resistive load.
Input voltage $v_{in}$, rectified output voltage $v_{out}$, and output current $i_{out}$ – the diode conducts only while $v_{in}\gt 0$.