Question 6 of 7: Full-Wave Center-Tapped Rectifier and RC Filter Design
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
National Exams December 2015 — 04-BS-4 Electric Circuits and Power, 3 hours, closed book (one aid sheet permitted, Casio/Sharp approved calculators). The paper instructs "any five questions constitute a complete paper" and marks only the first five answered; every question is solved so the set stands as a complete study resource.
Reference texts: Sadiku, Fundamentals of Electric Circuits (6th ed.) — DC/AC circuit analysis, Thevenin/Norton, first-order transients, phasors, magnetic circuits, diode rectifiers; Mano & Ciletti, Digital Design — combinational logic design (Question 7).
Check: several figure dimensions/polarities in this paper are read directly from the printed figure (vision-caption topology is a known failure mode on this subject); the specific reads are flagged inline where they affect a result (Q2 Thevenin distractor branch, Q5 mean magnetic path lengths, Q7 "desired temperature reached" logic).
Check: the source labels this item "Problem 6" rather than "Question 6" (a printed-header quirk of this paper, confirmed against the PDF); it is answered here as an ordinary, fully-printed question like the other six.
Given. Center-tapped transformer secondary, 10 VRMS each half (turns ratio 110/10/10); 60 Hz source; RL=50 kΩ; two-diode full-wave topology.
Given data
f
Secondary (each half)
RL
Diode drop (part c)
Filter R (part d)
Target attenuation
60 Hz
10 VRMS
50 kΩ
0.5 V
100 Ω
−20 dB @ 60 Hz
Find. The schematic and waveform sketches; peak/average load current (ideal diodes); output waveform with a 0.5 V diode drop; the capacitor value for the specified RC low-pass filter.
Full-wave, two-diode, center-tapped rectifier: each half of the secondary conducts through its own diode on alternate half-cycles, both feeding the same load with the same polarity.
Approach. Each secondary half alternately forward-biases its diode once per cycle, so the load always sees a positive half-sine — ripple frequency is twice the line frequency (120 Hz). Peak/average currents follow from the standard full-wave results; the RC filter is sized from the magnitude of a first-order low-pass transfer function at the specified frequency.
Schematic and waveforms (part a). D1 conducts while the top half of the secondary is positive (with respect to the center tap, CT); D2 conducts while the bottom half is positive. Both deliver current to RL in the SAME direction, so the load voltage/current is a full-wave-rectified sine at twice the source frequency; each diode individually carries current for only half of every cycle (a half-sine pulse, zero the other half).
Input: each secondary half, Vm=14.14 V, 60 Hz.
Output across RL with ideal diodes: full-wave rectified, ripple frequency 120 Hz.
Diode D1 current: conducts only while its half of the secondary is positive (D2 is the mirror image, conducting the alternate half-cycles).
Peak and average load current, ideal diodes (part b). Each secondary half has peak $V_m=\sqrt2\,(10) = 14.142$ V: $$I_{pk} = \frac{V_m}{R_L} = \frac{14.142}{50{,}000} = \boxed{282.8\ \mu\text{A}}$$For a full-wave rectified sine the average is $2/\pi$ of the peak: $$\boxed{I_{avg} = \frac{2I_{pk}}{\pi} = \frac{2(282.8\ \mu\text{A})}{\pi} = 180.1\ \mu\text{A}}$$
Output with a 0.5 V diode drop (part c). Each conducting diode subtracts its forward drop from the peak: $$V_{pk,out} = V_m - 0.5 = 14.142-0.5 = \boxed{13.642\text{ V}}$$$$I_{pk}=\frac{13.642}{50{,}000}=272.8\ \mu\text{A}, \qquad I_{avg}=\frac{2I_{pk}}{\pi}=\boxed{173.7\ \mu\text{A}}$$The output waveform keeps the same full-wave shape, just clipped 0.5 V below each input peak and pinned at 0 V wherever $|v_{in}|<0.5$ V (a brief dead-zone near each zero crossing where neither diode conducts).
Output with 0.5 V diode drop: same full-wave shape, peak reduced to 13.64 V.
RC low-pass filter design (part d). A first-order RC low-pass has $|H(j\omega)| = 1/\sqrt{1+(\omega RC)^2}$, unity (0 dB) at DC. Requiring −20 dB (a factor of 10 in voltage) at f=60 Hz: $$\frac{1}{\sqrt{1+(\omega RC)^2}} = 10^{-20/20}=0.1 \;\Rightarrow\; \omega RC = \sqrt{10^2-1}=9.950$$$$C = \frac{9.950}{\omega R} = \frac{9.950}{2\pi(60)(100)} = \boxed{263.9\ \mu\text{F}}$$(Checked directly: at f=60 Hz this C and R=100 Ω give $20\log_{10}|H|=-20.00$ dB exactly.) Note the load ripple itself is really at 120 Hz for a full-wave rectifier — the filter is sized here exactly as the question specifies, against the 60 Hz line frequency; sizing against the true 120 Hz ripple would need a smaller capacitor for the same 20 dB target and is noted as a design refinement.
