NivaarExam PrepOfficial exam papers ↗

22-Elec-A1 Circuits · May 2015

Question 4 of 6: AC power — source current, voltage and power triangle

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

Reference texts: C. K. Alexander & M. N. O. Sadiku, Fundamentals of Electric Circuits (7th ed., McGraw-Hill) — mesh/supermesh and nodal analysis, first-order RC transients, AC steady-state phasors, complex power, Thévenin’s theorem and maximum-power transfer, and Laplace-domain circuit analysis; W. H. Hayt, J. E. Kemmerly & S. M. Durbin, Engineering Circuit Analysis (9th ed.) — companion treatment of initial-condition source models in the s-domain.

Closed-book national examination, 3 hours, six questions of equal value; any five constitute a complete paper. All six are solved here. A Laplace-transform table is supplied with the paper. Phasor results are quoted as magnitude∡angle with angles in degrees; sources marked rms are treated as rms.

Question 4: AC power — source current, voltage and power triangle [6 + 6 + 8]

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

QuantityValue
Frequency$f=60\text{ Hz}$ ($\omega=377\text{ rad/s}$)
Line $R,\,L$$10\,\Omega,\ 0.1\text{ H}\ (X_L=37.7\,\Omega)$
Load$2\text{ kVA}$, $0.8$ pf lagging
Load voltage $V_o$$110\angle 0^\circ\text{ V (rms)}$
Capacitor$C=50\ \mu\text{F}\ (X_C=53.1\,\Omega)$

Find. $I_s$, $V_s$, the phasor relationship among $V_o,I_s,V_s$, and the source power triangle $S,P,Q$ with power factor.

+−VsIsR = 10 ΩL = 0.1 HI₀2 kVA0.8 pflagging+−V₀ = 110∠0° V (rms)IcC = 50 µF
Figure 4 — a $2\text{ kVA}$ lagging load and a shunt capacitor share the node at $V_o=110\angle0^\circ$; the source feeds them through the series $R$–$L$ line.

Approach. Get the load current from its rated $S$ and $V_o$, the capacitor current from $V_o/Z_C$, add them for $I_s$, then walk the line impedance drop back to $V_s$ and form $S=V_sI_s^{*}$.

  1. Load current. $S_L=2000\angle 36.87^\circ=1600+j1200\text{ VA}$ (lagging), so$$I_o=\left(\frac{S_L}{V_o}\right)^{\!*}=\left(\frac{2000\angle 36.87^\circ}{110\angle 0^\circ}\right)^{\!*}=18.18\angle{-36.87^\circ}\text{ A}.$$
  2. Capacitor current. $Z_C=1/(j\omega C)=-j53.05\,\Omega$, so$$I_C=\frac{V_o}{Z_C}=\frac{110\angle 0^\circ}{53.05\angle{-90^\circ}}=2.07\angle 90^\circ\text{ A}.$$
  3. Source current (KCL). $I_s=I_o+I_C=14.55-j8.84=\boxed{\,17.02\angle{-31.28^\circ}\text{ A}\,}$ — the capacitor has partially corrected the lagging load.
  4. Source voltage (KVL up the line). $Z_{\text{line}}=10+j37.70\,\Omega$:$$V_s=V_o+I_sZ_{\text{line}}=110+(17.02\angle{-31.28^\circ})(39.0\angle 75.14^\circ)=\boxed{\,747\angle 38.0^\circ\text{ V}\,}$$
  5. Complex power from the source.$$S=V_sI_s^{*}=(747\angle 38.0^\circ)(17.02\angle 31.28^\circ)=12.71\text{ kVA}\angle 69.29^\circ.$$ Hence $P=4.50\text{ kW}$, $Q=+11.89\text{ kvar}$ (lagging), and$$\text{pf}=\cos 69.29^\circ=\boxed{\,0.354\text{ lagging}\,}$$
  6. Power-balance check. $P=|I_s|^2R+P_L=(17.02)^2(10)+1600=4.50\text{ kW}$ and $Q=|I_s|^2X_L+Q_L-|V_o|^2/X_C=10.92+1.20-0.23=11.89\text{ kvar}$ — both match.

The phasor diagram takes $V_o=110\angle0^\circ$ as reference: $I_o$ lags it by $36.9^\circ$, $I_C$ leads by $90^\circ$, their sum $I_s$ lags $V_o$ by $31.3^\circ$, and $V_s$ leads $V_o$ by $38.0^\circ$ (the inductive line drop rotates $V_s$ ahead).

QuantityValue
$I_o$ (load)$18.18\angle{-36.87^\circ}\text{ A}$
$I_C$$2.07\angle 90^\circ\text{ A}$
$I_s$$17.02\angle{-31.28^\circ}\text{ A}$
$V_s$$747\angle 38.0^\circ\text{ V}$
$S,\,P,\,Q$$12.71\text{ kVA},\ 4.50\text{ kW},\ 11.89\text{ kvar}$
Power factor$0.354$ lagging