Question 5 of 6: Capacitor voltage by superposition
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
National Examination — 16‑Elec‑A1 Circuits, December 2019. Closed‑book, 3 hours; any five of the six questions constitute a complete paper (all six are solved here). A short Laplace‑transform table and star–delta / maximum‑power formulae are supplied with the exam.
Reference texts. C. K. Alexander & M. N. O. Sadiku, Fundamentals of Electric Circuits, 7th ed. (McGraw‑Hill); W. H. Hayt, J. E. Kemmerly & S. M. Durbin, Engineering Circuit Analysis, 9th ed. (McGraw‑Hill). Methods: series/parallel & Δ–Y reduction, nodal analysis, first‑order and second‑order transients, AC phasor / Thévenin analysis, maximum‑power transfer, superposition, and the Laplace‑transform method.
Reconstructed figures. Each network below is redrawn element‑by‑element from the paper’s figures; every reference node, source polarity, switch state and current direction used in the solution is stated alongside it so a reader can reproduce every sign. Where a component placement could not be read with certainty it is flagged in a Check note — check those against your own copy of the paper.
Question 5: Capacitor voltage by superposition [20]
[Figure not reproduced: Figure‑5 — redrawn parallel AC network. Five branches share one node pair: a current source $i_s=5\cos(20t+10^\circ)$ A, a $10\,\Omega$ resistor, a $0.5$ F capacitor (output $V_o$), a $2$ H inductor, and an ideal voltage source $V_s=10\sin20t$ V. All operate at $\omeg. See the official exam paper.]
Given. All five elements are connected in parallel between the same two nodes; $V_o$ is the voltage across the $0.5$ F capacitor. Both sources act at $\omega=20$ rad/s: $i_s=5\cos(20t+10^\circ)$ A and the ideal $V_s=10\sin20t$ V.
Find. $V_o(t)$, obtained as the sum of the responses to $i_s$ acting alone and $V_s$ acting alone.
Approach. Apply superposition: deactivate one source at a time. The decisive observation is that an ideal voltage source sits directly across the output node, so it clamps $V_o$ regardless of the other elements.
Response to $i_s$ alone (kill $V_s$). Deactivating an ideal voltage source replaces it with a short‑circuit. That short is placed directly across the output node, so it also shorts the capacitor: the entire current $i_s$ returns through the short and $$V_{o,1}(t)=0.$$ None of the R, L, C values enter — the short wins.
Response to $V_s$ alone (kill $i_s$). Deactivating the current source opens its branch. The ideal $V_s$ is still connected directly across the capacitor, so it fixes the node voltage exactly: $$V_{o,2}(t)=V_s=10\sin20t\ \text{V}.$$
Superpose. $$\boxed{V_o(t)=V_{o,1}+V_{o,2}=10\sin20t\ \text{V}.}$$ The current source, resistor, inductor and capacitor all draw current from $V_s$ but cannot alter the clamped node voltage; their only effect is on the current the ideal source must supply.
Check — ideal‑source clamp. This reading takes the $V_s$ branch as an ideal source directly in parallel with the output (as the reconstruction shows), which makes $V_o=V_s$ exactly and the current‑source contribution zero — a recurring “trick” in this exam series. If your copy places a series element (e.g. the 2 H inductor) between $V_s$ and the capacitor node, redo step 2 as a phasor divider at $\omega=20$ with $Z_C=-j0.1\,\Omega$, $Z_L=j40\,\Omega$, $R=10\,\Omega$.