Lag-controller design from frequency response: 22-Elec-A2 Systems and Control, May 2013, Q5

Question 5 — Lag-controller design from frequency response [10 + 10]

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Figure Q5.1 (block) — Unit-feedback lag control, $G_c(s)=K_c(\alpha Ts+1)/(Ts+1)$, process $G(s)=40/(s^3+11s^2+18s+5)$.

Part A — Uncompensated system [10]

Given. $G(s)=\dfrac{40}{s^3+11s^2+18s+5}$; open-loop poles at $s=-0.32,-2.35,-8.33$ (roots of the denominator).

DC gain. $K_{dc(open)}=G(0)=40/5=8\;(=18.06\ \text{dB})$ — matches the low-frequency asymptote in Figure Q5.1.
Gain cross-over and phase margin. Solving $|G(j\omega)|=1$ gives $\omega_{cg}=1.78\ \text{rad/s}$; the phase there is $-138.6^\circ$, so $$\text{PM}=180^\circ-138.6^\circ=\boxed{41.4^\circ}.$$
Closed-loop dominant model. The uncompensated closed-loop characteristic polynomial is $s^3+11s^2+18s+45=0$, with roots $-9.61$ and $-0.693\pm j2.05$. The dominant pair gives $\omega_n=\sqrt{0.693^2+2.05^2}=2.16\ \text{rad/s}$, $\zeta=0.693/2.16=0.320$, and $K_{dc}=G(0)/[1+G(0)]=8/9=0.889$: $$G_m(s)=\frac{0.889(2.16)^2}{s^2+1.385s+4.68}=\frac{4.16}{s^2+1.385s+4.68}.$$
Step-response estimates. Type 0 system (no integrator): $K_{pos}=8,\ K_v=0,\ K_a=0$. Steady-state error to a step $e_{ss}=\dfrac{1}{1+K_{pos}}=\dfrac{1}{9}=\boxed{11.1\%}$. Percent overshoot $\text{PO}=e^{-\zeta\pi/\sqrt{1-\zeta^2}}=34.6\%$. Settling time $T_{settle}=4/(\zeta\omega_n)=5.77\ \text{s}$.

Part B — Lag-controller design [10]

Approach. Set the low-frequency gain $K_c$ to meet the 5% error, then place the lag pole/zero so the gain crossover drops to a frequency where the phase margin corresponds to 10% overshoot ($\zeta=0.591\Rightarrow\text{PM}\approx59^\circ$), adding a few degrees for the lag's own phase.

Gain for the error spec. $e_{ss}=5\%\Rightarrow K_{pos}=\dfrac{1}{0.05}-1=19$. Since the plant contributes $G(0)=8$ and the lag's DC gain is $K_c$, $K_c\cdot8=19\Rightarrow K_c=2.375$.
Target crossover. For $\text{PO}=10\%$, $\zeta=0.591$ and the required phase margin is $\approx58.6^\circ$; allowing $\approx6^\circ$ for the lag, aim for $\text{PM}\approx64.6^\circ$. The plant reaches phase $-(180-64.6)=-115.4^\circ$ at $\omega'_{cg}\approx1.13\ \text{rad/s}$.
Attenuation $\alpha$. The magnitude of $K_cG$ at $\omega'_{cg}$ is $4.56$; the lag must pull it to $0$ dB, so $\alpha=1/4.56=0.22$.
Corner frequencies. Put the lag zero a decade below $\omega'_{cg}$: $\dfrac{1}{\alpha T}=\dfrac{\omega'_{cg}}{10}=0.113\Rightarrow \alpha T=8.85$, hence $T=\alpha T/\alpha=40.5\ \text{s}$ and the pole $1/T=0.0247$. $$\boxed{G_c(s)=2.375\,\frac{8.85s+1}{40.5s+1}}\quad(\alpha=0.22,\ K_c=2.375).$$
Compensated step estimates. The redesigned crossover $\omega'_{cg}=1.13\ \text{rad/s}$ gives $\text{PM}\approx60^\circ$, so $\zeta\approx0.59$: $e_{ss}=5\%$, $\text{PO}\approx10\%$, and $T_{settle}\approx4/(\zeta\omega_n)\approx4.3\ \text{s}$ (the slow lag pole adds a small long-time tail, so the true settling time is a little longer).

Quantity	Uncompensated	Lag-compensated
Open-loop DC gain	$8$ (18.06 dB)	$19$ (25.6 dB)
Phase margin / $\omega_{cg}$	$41.4^\circ$ / $1.78$ rad/s	$\approx60^\circ$ / $1.13$ rad/s
Model $\zeta,\ \omega_n$	$0.320,\ 2.16$	$\approx0.59$
$e_{ss}$ (step)	$11.1\%$	$5\%$
Percent overshoot	$34.6\%$	$\approx10\%$
Settling time (2%)	$5.77$ s	$\approx4.3$ s
Controller / type	$\boxed{G_c=2.375\frac{8.85s+1}{40.5s+1};\ \text{Type 0},\ K_{pos}=19}$

Concept & Theory

Topic. Bode-plot lag (phase-lag) compensator design for error and overshoot specs.

Key relations. Type-0 step error $e_{ss}=1/(1+K_{pos})$; PM–$\zeta$ rule $\text{PM}\approx100\zeta$ (or the exact $\arctan$ relation); lag adds low-frequency gain $K_c$ and attenuates the high-frequency band by $\alpha\lt 1$, dropping the crossover to a higher-phase region.

Why this works. A lag compensator buys steady-state accuracy (DC gain $K_c$) without destabilizing, by moving the gain crossover to a lower frequency where the plant still has healthy phase margin; the pole/zero pair is placed well below crossover so its $\approx-5^\circ$ residual lag there is negligible.

Common pitfall. Placing the lag zero too close to crossover (its phase lag then erodes the very margin you are protecting), or forgetting that the slow lag pole leaves a long settling tail.

Source. Nise §11 (lag compensation via Bode), §7 (steady-state error, system type, error constants).

Question 5 of 8: Lag-controller design from frequency response

Question 5 — Lag-controller design from frequency response [10 + 10]

Part A — Uncompensated system [10]

Part B — Lag-controller design [10]