Paper format. National Exams, May 2015 — 07-Elec-A4 Digital Systems & Computers. Three hours, closed book, one approved Casio or Sharp calculator. Six questions are printed and five constitute a complete exam; every question is worth 12 marks, with the per-part split printed in the marking scheme on page 1. A flip-flop excitation table and a Boolean-identity sheet are attached to the paper. All six questions are solved below, so that the set works as a complete study resource.
Reference texts.
- M. M. Mano and M. D. Ciletti, Digital Design, 5th ed. — Ch. 2 (Boolean algebra and gate-level minimisation), Ch. 3 (K-maps, NAND/NOR implementation), Ch. 4 (combinational design: adders and subtractors), Ch. 5 (synchronous sequential logic, state tables and diagrams, Moore vs Mealy).
- J. F. Wakerly, Digital Design: Principles and Practices, 4th ed. — Ch. 4 (combinational design practices, bubble-to-bubble logic), Ch. 7 (latches, flip-flops and their excitation tables).
- C. Hamacher, Z. Vranesic, S. Zaky and N. Manjikian, Computer Organization and Embedded Systems, 6th ed. — Ch. 2 (byte order, stacks), Ch. 3 (I/O, interrupt-driven serial transfer).
- Freescale/Motorola, M68HC11 Reference Manual (rev. 6) — stack operation of
PSHX/PSHY, big-endian storage of 16-bit operands, SCI registers.
- TIA/EIA-232-F, Interface Between Data Terminal Equipment and Data Circuit-Terminating Equipment Employing Serial Binary Data Interchange — signal-level definitions used in Question 5(b).
