22-Elec-A5 Electronics · December 2016

Question 4 of 5: Matched NMOS Pair with Diode-Connected Reference

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

National Exam — 07-Elec-A5 Electronics — December 2016. Closed-book; any non-communicating calculator permitted; three hours. Five questions, 20 marks each — all five constitute a complete paper, so every question is solved below. Per the paper’s notes, op-amps are ideal with supply rails of ±15 V unless a question states otherwise, and ground/chassis are common.

Reference texts (22-Elec-A5 Electronics): A. S. Sedra & K. C. Smith, Microelectronic Circuits, 8th ed. (Oxford) — diode circuits and rectifiers (Ch. 4), MOSFET biasing and amplifiers (Ch. 5–7), op-amp circuits and offsets (Ch. 2/9), BJT amplifiers (Ch. 6–7); R. C. Jaeger & T. N. Blalock, Microelectronic Circuit Design (McGraw-Hill).

Question 4: Matched NMOS Pair with Diode-Connected Reference (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. $V_{DD}=+10$ V feeds $Q_1$ through a 10 kΩ drain resistor and $Q_2$ through 15 kΩ. The gates are tied together and connected to $Q_2$’s drain through a 10 MΩ resistor (so $Q_2$ is diode-connected and draws no gate current); both sources are grounded. Devices identical: $V_{TH}=2$ V, $K=0.1$ mA/V$^2$, $\lambda=0$.

Find. (a) $I_D,V_G$ of $Q_2$; (b) $I_D,V_D$ of $Q_1$; (c) $g_m$ of both.

Figure 4. $Q_2$ is diode-connected through the 10 MΩ resistor (no gate current, so $V_G=V_{D2}$); the common gate also drives $Q_1$, which shares the same $V_{GS}$ and therefore the same drain current.

Approach. Because the 10 MΩ resistor carries no gate current, $V_G$ equals $Q_2$’s drain voltage — $Q_2$ is diode-connected. Equate its square-law current to the current the 15 kΩ resistor delivers, solve for $V_G$, then use the shared $V_{GS}$ to get $Q_1$.

$Q_2$ is diode-connected. No gate current flows through the 10 MΩ resistor, so $V_{G}=V_{D2}$ and $V_{GS2}=V_G$ (source grounded). With $V_{D2}\gt V_{GS2}-V_{TH}$, $Q_2$ is in saturation.
Balance $Q_2$’s current. Its drain current equals the 15 kΩ resistor current: $$\tfrac12K(V_G-V_{TH})^2=\frac{V_{DD}-V_G}{15} \;\Rightarrow\;0.75\,(V_G-2)^2=10-V_G.$$
Solve for $V_G$. Expanding, $0.75V_G^2-2V_G-7=0$, so $$V_G=\frac{2+\sqrt{4+21}}{1.5}=\frac{2+5}{1.5}=\boxed{4.67\ \text{V}},$$ and the drain current of $Q_2$ is $$I_{D2}=\tfrac12(0.1)(4.67-2)^2=\boxed{0.356\ \text{mA}} \;\big(\text{check: }(10-4.67)/15=0.356\ \text{mA}\big).$$
(b) $Q_1$ current. $Q_1$ shares the same gate voltage and a grounded source, so $V_{GS1}=V_{GS2}=4.67$ V and (identical devices, saturation) $$\boxed{I_{D1}=I_{D2}=0.356\ \text{mA}}.$$
$Q_1$ drain voltage. $$V_{D1}=V_{DD}-I_{D1}(10)=10-(0.356)(10)=\boxed{6.44\ \text{V}}.$$ Since $V_{D1}=6.44\gt V_{GS1}-V_{TH}=2.67$ V, $Q_1$ is indeed saturated.
(c) Transconductance. Both devices operate at the same $V_{GS}$ and current, so $$g_{m1}=g_{m2}=K(V_{GS}-V_{TH})=0.1(2.67)=\boxed{0.267\ \text{mA/V}} =\sqrt{2K I_D}\ \checkmark.$$

Question 4 — results
Quantity	Value
(a) $V_G$ of $Q_2$	4.67 V
(a) $I_{D2}$	0.356 mA
(b) $I_{D1}$	0.356 mA
(b) $V_{D1}$	6.44 V
(c) $g_{m1}=g_{m2}$	0.267 mA/V

Topic. Diode-connected reference driving a matched MOSFET (current-mirror style bias).

Key relations. Diode connection $V_G=V_D$ (no gate current); saturation $I_D=\tfrac12K(V_{GS}-V_{TH})^2$; matched pair at equal $V_{GS}\Rightarrow$ equal $I_D$; $g_m=K(V_{GS}-V_{TH})=\sqrt{2KI_D}$.

Why this works. A gate resistor large enough that its $IR$ drop is negligible (10 MΩ here, but the current is nanoamps) leaves $V_G=V_D$, forcing the reference into saturation and pinning $V_{GS}$. Any identical transistor tied to that same $V_{GS}$ copies the current — the essence of the MOS current mirror — even though the two drain resistors differ, which only changes the drain voltages, not the currents.

Common pitfall. Keeping the negative quadratic root, forgetting to verify saturation of $Q_1$ (its 10 kΩ load could pull the drain below $V_{GS}-V_{TH}$), or thinking the different drain resistors give different currents (they do not, since $\lambda=0$ makes $I_D$ independent of $V_D$).

Source. Sedra & Smith, Microelectronic Circuits, §7.4–7.5 (MOS biasing and current mirrors); Jaeger & Blalock §4, §16.

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