19-Soft-A4 Real-Time Systems · May 2016
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Paper: National Exams, May 2016, 04-Soft-A4 Real-time Systems, 3 hours, closed book. Any five of the six questions constitute a complete paper (all questions answered below as a full study resource). Reference texts: Liu, Real-Time Systems; Buttazzo, Hard Real-Time Computing Systems; Kopetz, Real-Time Systems: Design Principles for Distributed Embedded Applications; Ogata, Modern Control Engineering.
Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.
Part (1) — a network protocol fitting the constant-delay model. A time-triggered protocol (TTP) / TDMA-based fieldbus — e.g. TTP/C, FlexRay in its static (time-triggered) segment, or a switched Ethernet network running a deterministic scheduling layer such as Time-Sensitive Networking (TSN) — fits the constant-delay assumption, because every node is assigned a fixed, pre-computed transmission slot within a repeating communication cycle known in advance to the whole network. Since each message always occupies the same slot relative to the cycle start, the end-to-end transport delay for a given sensor-to-controller or controller-to-actuator message is the same on every cycle (up to clock-sync jitter, which is itself tightly bounded) — exactly the constant, deterministic $\tau_{sc}$/$\tau_{ca}$ the problem assumes. (Contrast this with CSMA/CD Ethernet or CAN under contention, where message delay is load-dependent and only probabilistically bounded — a poor fit for the constant-delay model.)
Part (2) — effect of excessive delay on closed-loop performance. In frequency-domain terms, a pure transport delay $\tau$ in a feedback loop contributes phase lag $-\omega\tau$ (radians) that grows linearly with frequency, while leaving the magnitude response unchanged. This erodes the loop's phase margin at the (unchanged) gain-crossover frequency without warning the designer via any gain-margin symptom — the loop looks fine on a Bode magnitude plot but is quietly losing its stability cushion. As delay increases: transient response first becomes more oscillatory and slower to settle (reduced effective phase margin (part 3) increases overshoot and ringing); pushed further, the loop's damping approaches zero and the system rings persistently; and beyond the critical delay found in part (3), the phase margin is consumed entirely and the closed loop becomes unstable — sustained or growing oscillation, not merely sluggish tracking. Because both $\tau_{sc}$ and $\tau_{ca}$ add directly (their phase contributions sum), the network is effectively inserted as extra, uncompensated lag in a loop that was tuned assuming it did not exist — and because the process is stated to be open-loop unstable, the controller (and its phase margin) is the ONLY thing keeping the loop stable at all, which makes this erosion especially consequential here.
Part (3) — maximum tolerable total network delay. A constant time delay $\tau$ has frequency response $e^{-j\omega\tau}$: unity magnitude at every frequency, and phase $-\omega\tau$ (radians) that grows linearly with $\omega$. The loop was designed with phase margin $\phi_m=45^{\circ}$ at crossover $\omega_c=3.5$ rad/s assuming zero delay; the network delay eats directly into that margin at the crossover frequency (magnitude is unaffected by the delay, so the crossover frequency itself does not shift to first order). The loop remains stable as long as the delay-induced phase lag at crossover does not exceed the available margin: $$\phi_m \ge \omega_c\,(\tau_{sc}+\tau_{ca})$$ Solving for the maximum total delay, $$\boxed{(\tau_{sc}+\tau_{ca})_{\max} = \frac{\phi_m}{\omega_c}}$$ Substituting the given values (with $\phi_m$ converted to radians): $$\phi_m = 45^{\circ} = \frac{\pi}{4}\ \text{rad} = 0.7854\ \text{rad}$$ $$(\tau_{sc}+\tau_{ca})_{\max} = \frac{0.7854}{3.5} = 0.2244\ \text{s} \approx \boxed{224\ \text{ms}}$$ Any total round-trip network delay beyond ≈224 ms consumes the entire 45° design margin at the crossover frequency and drives the closed loop unstable.
| Quantity | Value |
|---|---|
| Suitable protocol class | Time-triggered / TDMA (e.g. TTP, FlexRay static segment, TSN Ethernet) |
| Phase margin, $\phi_m$ | 45° = 0.7854 rad |
| Crossover frequency, $\omega_c$ | 3.5 rad/s |
| Max. total network delay, $(\tau_{sc}+\tau_{ca})_{\max}$ | 0.2244 s ≈ 224 ms |