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22-Agric-A5 Principles of Instrumentation · May 2017

Question 3 of 7: Operational-Amplifier Instrumentation Amplifiers

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

National Exams, 04-Agric-A5, Principles of Instrumentation. 3 hours, open book. Questions 1 and 2 are mandatory (20 marks each); candidates select any THREE of Questions 3–7 (20 marks each) for the official 100-mark paper — all FIVE optional questions are answered below so this set is a complete study resource.

Reference texts: Doebelin, Measurement Systems: Application and Design, 5th ed.; Bentley, Principles of Measurement Systems, 4th ed.; Horowitz & Hill, The Art of Electronics, 3rd ed.; Fraden, Handbook of Modern Sensors, 5th ed.; Skoog, Holler & Crouch, Principles of Instrumental Analysis, 7th ed.

Question 3: Operational-Amplifier Instrumentation Amplifiers (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

+-A1V1R1out1+-A2V2R2out2Rg-+A3RRRRVoutStage 1 — buffer/gain (Rg sets gain)Stage 2 — matched-R difference amp (sets CMRR)Three-op-amp instrumentation amplifier
Fig. 1 — Classic three-op-amp instrumentation amplifier. Stage 1 (A1, A2) buffers $V_1$, $V_2$ with gain set by $R_1$, $R_2$, $R_g$; Stage 2 (A3) is a matched-resistor difference amplifier that rejects whatever is common to both inputs and outputs $V_{out}$.

a) Three ideal op-amp characteristics: (1) very high (ideally infinite) open-loop gain, so under negative feedback the closed-loop gain is fixed entirely by the external feedback network rather than by the op-amp's own imprecise, supply- and temperature-dependent open-loop gain; (2) very high (ideally infinite) input impedance, so negligible current is diverted into the op-amp's own input terminals and essentially all current predicted by the external resistor network actually flows through it; and (3) very low (ideally zero) output impedance, so $V_{out}$ is not attenuated by loading from whatever follows. Together with the resulting “virtual short” between the two inputs, these three properties mean the circuit's input–output behaviour is dictated only by the external resistors.

b) Given. pH electrode source impedance $R_s=500\times10^6\ \Omega$; the amplifier's input impedance $R_{in}$ forms a voltage divider with $R_s$, and the reading must be within 0.1% of the true sensor voltage.

Find. The minimum required amplifier input impedance $R_{in}$.

Approach. Model the sensor and amplifier input as a simple voltage divider and require the divider's fractional error to be $\le 0.1\%$.

  1. Write the divider error. The amplifier reads $V_{measured}=V_{true}\cdot\dfrac{R_{in}}{R_{in}+R_s}$, so the fractional shortfall from the true sensor voltage is $$\text{error}=\dfrac{V_{true}-V_{measured}}{V_{true}}=\dfrac{R_s}{R_{in}+R_s}.$$
  2. Impose the 0.1% requirement. For $R_{in}\gg R_s$ this simplifies to $\text{error}\approx R_s/R_{in}$; setting it equal to the 0.1% (0.001) limit and solving for $R_{in}$: $$\dfrac{R_s}{R_{in}}\le 0.001 \;\Longrightarrow\; R_{in}\ge \dfrac{R_s}{0.001}=1000\,R_s.$$
  3. Substitute the numbers. $$R_{in}\ge 1000\times(500\times10^6\ \Omega)=\boxed{5\times10^{11}\ \Omega = 500\ \text{G}\Omega.}$$

c) FET-input (JFET) or CMOS/MOSFET-input op-amps — often purpose-built “electrometer” amplifiers. Their gate is a reverse-biased junction or an insulated gate rather than a forward-biased base, so the input (bias) current is in the femtoamp–picoamp range and the effective input impedance reaches $10^{12}$–$10^{15}\ \Omega$ — far beyond what a bipolar-input op-amp (base current in the nanoamp range) can provide, and comfortably above the $\ge 500\ \text{G}\Omega$ found in part (b).

d) Input bias current is the small DC current that must flow into (or out of) each op-amp input terminal to bias its internal input transistors — base current for a bipolar input stage, or gate leakage current for a FET input stage — present even in a very high quality, near-ideal amplifier. If $V_1$ is connected to a pH electrode (an extremely high-impedance, essentially floating source with no built-in DC path to ground) and $V_2$ to a similarly high-impedance reference electrode, this bias current has nowhere to flow to or from; without a return path, charge accumulates on the floating input node and its DC operating point drifts uncontrolled until the amplifier saturates against a supply rail. A bias-current return path — typically a large resistor from each input to a reference/ground — supplies the missing route for this small current, holding the DC operating point defined without materially loading the high-impedance sensor signal itself.

e) The second stage's ability to reject a signal common to both inputs (its CMRR) depends entirely on the four gain-setting resistors having EXACTLY matched ratios between the two signal paths into A3. If the resistor values are not matched, a purely common-mode input at $out1$/$out2$ no longer cancels perfectly and produces a small but nonzero differential error at $V_{out}$ — any mismatch directly limits the achievable CMRR. Because the two paths in this circuit use the same nominal value $R$ throughout, precision, low-temperature-coefficient resistors are required in practice to realize a genuinely high CMRR.

f) Differentiation is a high-pass operation — its gain rises with frequency (proportional to $2\pi f$ for a sinusoidal component) — so it amplifies broadband high-frequency noise far more than the typically lower-frequency signal of interest, DEGRADING the output's signal-to-noise ratio. Integration is the opposite: a low-pass operation (gain falling as $1/2\pi f$) that attenuates high-frequency noise more than the desired signal and also averages/smooths random fluctuations over time, IMPROVING the output SNR. Differentiation should therefore be used cautiously (and usually band-limited) in a noisy signal chain, while integration is a natural, often-exploited noise-reduction operation.

QuantityResult
Minimum amplifier input impedance for ≤0.1% error ($R_s=500\ \text{M}\Omega$)$R_{in}\ge 5\times10^{11}\ \Omega = 500\ \text{G}\Omega$
First-stage op-amp type for this impedanceFET/CMOS (electrometer-grade)
Effect of differentiation on output SNRdegrades it (high-pass, boosts high-frequency noise)
Effect of integration on output SNRimproves it (low-pass, averages out noise)