22-Elec-A4 Digital Systems and Computers · December 2017
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
National Exams — 16-Elec-A4 Digital Systems & Computers — December 2017. Closed book; 3 hours; six questions of 12 marks each, of which any five constitute a complete paper. All six are solved below as a study resource. Permitted aids: Casio or Sharp approved calculator; a sheet of Boolean identities and a flip-flop excitation table are supplied with the paper.
Reference texts. M. Morris Mano & M. D. Ciletti, Digital Design (Pearson); C. H. Roth & L. L. Kinney, Fundamentals of Logic Design (Cengage); J. F. Wakerly, Digital Design: Principles and Practices (Pearson); Hamacher, Vranesic & Zaky, Computer Organization (McGraw-Hill) for the interrupt / timer material.
Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.
Given. Two edge-triggered RS flip-flops with the input equations above; state is $(A,B)$, single input $X$.
Find. The four input expressions, the state transition table and diagram, and a reasoned RS-vs-JK comparison.
Approach. Apply the RS characteristic equation $Q^{+}=S+\overline{R}\,Q$ (valid only while $SR=0$) to each state/input, flag any input that drives $S=R=1$, then read the diagram off the table and use the forbidden combinations to motivate the JK comparison.
Directly from the network: $$S_A=\overline{X}\,\overline{B}+X\overline{A},\quad R_A=XB+\overline{X}A,\quad S_B=XA,\quad R_B=\overline{X}A.$$
| A | B | X | $S_A$ | $R_A$ | $S_B$ | $R_B$ | $A^{+}$ | $B^{+}$ | note |
|---|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | |
| 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | |
| 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | |
| 0 | 1 | 1 | 1 | 1 | 0 | 0 | (1) | 1 | S=R=1 forbidden |
| 1 | 0 | 0 | 1 | 1 | 0 | 1 | (0) | 0 | S=R=1 forbidden |
| 1 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | |
| 1 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 |
Every input is well defined except two: at state $(A,B)=(0,1)$ with $X=1$ and at $(1,0)$ with $X=0$ the network drives $S_A=R_A=1$, the forbidden RS input. The value shown in parentheses is what the JK realisation produces there (a toggle of $A$); the plain RS circuit would be indeterminate.
The RS (or SR) flip-flop obeys $Q^{+}=S+\overline{R}Q$ subject to the hard constraint $SR=0$: the combination $S=R=1$ asks the latch to set and reset at once and is not allowed, because the resulting output is unpredictable and depends on race conditions. The excitation table reflects this — for a $0\!\to\!0$ transition $S=0,R=\times$, and for $1\!\to\!1$ it is $S=\times,R=0$, but no row ever asks for $S=R=1$.
The JK flip-flop is the RS flip-flop with its own outputs fed back into the input gating: $J$ plays the role of $S$ and $K$ the role of $R$, but the forbidden input is redefined. When $J=K=1$ the device toggles ($Q^{+}=\overline{Q}$) instead of being undefined, because the feedback ensures only the set or the reset path is ever enabled at a clock edge. Its characteristic equation $Q^{+}=J\overline{Q}+\overline{K}Q$ is defined for all four input combinations.
Relationship and advantage. This machine makes the point concretely. Building it from RS flip-flops forces $S_A=R_A=1$ at two reachable operating points (the dashed transitions above), so the RS realisation is ill-defined exactly there. The supplied JK version uses $K_A=1$ so that flip-flop $A$ toggles whenever $J_A$ calls for a change, cleanly covering those two cases with $J=K=1$. The advantage of JK over RS is therefore decisive: JK removes the forbidden state, uses the ‘don’t-care’ freedom of the excitation table to simplify the input logic, and yields a fully defined, race-free machine — which is why sequential designs are almost always built with JK (or the derived D/T) flip-flops rather than bare RS latches.
Check: the two dashed transitions correspond to the RS-forbidden inputs; their next states are taken from the JK realisation the exam supplies.
| Item | Result |
|---|---|
| Well-defined transitions | 6 of 8 input/state pairs |
| Forbidden ($S_A=R_A=1$) | $(A,B,X)=(0,1,1)$ and $(1,0,0)$ |
| JK resolution there | toggle $A$ ($J_A=K_A=1$) |
| Key advantage of JK | no forbidden input; fully defined characteristic equation |