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22-Elec-B5 Advanced Electronics: December 2016

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

  1. Question 1 DC Bias, Gain and Terminal Resistances of a PNP–NPN Two-Stage Amplifier
  2. Question 2 Bias Design and Small-Signal Performance of an NMOS Cascode
  3. Question 3 Shunt–Shunt Feedback Trans-Resistance Amplifier
  4. Question 4 Standby Power, Swing, Drive, Output Power and Efficiency of a Class AB Stage
  5. Question 5 Miller (Pole-Splitting) Compensation of a Two-Pole Op Amp

Start with Question 1 →

07-Elec-B5 — Advanced Electronics — National Exams, December 2016 · 3 hours · CLOSED BOOK, any non-communicating calculator permitted · five questions, all to be answered, 20 marks each (100 marks total). Op-amps ideal and supplies ±15 V unless a question states otherwise; in schematics ground and chassis are common.

Reference texts for this subject:

  • A. S. Sedra & K. C. Smith, Microelectronic Circuits, 7th/8th ed. — Ch. 6–7 (BJT and MOS amplifier stages), Ch. 8 (cascodes and IC building blocks), Ch. 10 (frequency response), Ch. 11 (feedback, stability and frequency compensation), Ch. 12 (output stages and power amplifiers).
  • B. Razavi, Design of Analog CMOS Integrated Circuits, 2nd ed. — Ch. 3 (single-stage amplifiers and the cascode), Ch. 10 (stability and frequency compensation).
  • P. R. Gray, P. J. Hurst, S. H. Lewis & R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th ed. — Ch. 8 (feedback) and Ch. 9 (frequency response and compensation).
  • B. Razavi, Fundamentals of Microelectronics, 2nd ed. — the worked-example convention (including \(V_T = 26\) mV) used by several questions in this subject's paper series.