Question 2 of 5: Flip-Flop Conversion, Machine Types, Number Representations

Question 2: Flip-Flop Conversion, Machine Types, Number Representations (25 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. (a) An SR flip-flop primitive. (b) The Moore/Mealy machine classification. (c) 2’s complement and sign-magnitude as two binary encodings of signed integers. (d) Four candidate binary fractions to compare against the decimal value 1.03.

Find. (a) A minimum-gate JK-from-SR circuit. (b) Which machine type is noise-prone, with justification. (c) A contrast table of the two representations. (d) The closest binary value to 1.03, with justification.

Approach. (a) Feed the SR latch $S=J\cdot\overline{Q}$, $R=K\cdot Q$ so the invalid $S=R=1$ case can never occur. (b) Compare how each machine's output is generated: a function of state only, or of state and the raw input signal. (c) Compare the encodings directly on range, arithmetic cost, and zero representation. (d) Convert each binary fraction to decimal and compare absolute differences from 1.03.

1. Part (a) — JK flip-flop from an SR flip-flop. The JK characteristic table is $Q^+=J\overline{Q}+\overline{K}Q$ and the SR latch's is $Q^+=S+\overline{R}Q$ (with $S=R=1$ forbidden). Setting $$S = J\cdot\overline{Q}, \qquad R = K\cdot Q$$ makes $S$ and $R$ mutually exclusive by construction whenever $Q$ has a definite value (if $Q=1$ then $S=J\cdot 0=0$; if $Q=0$ then $R=K\cdot 0=0$), so $S=R=1$ is structurally impossible and the SR latch's forbidden state is never reached — the classic minimum realization, needing only 2 AND gates in addition to the SR latch itself. : $J=K=0\Rightarrow$ hold; $J=1,K=0\Rightarrow$ set; $J=0,K=1\Rightarrow$ reset; $J=K=1,Q=1\Rightarrow S=0,R=1\Rightarrow Q^+=0$ (toggle); $J=K=1,Q=0\Rightarrow S=1,R=0\Rightarrow Q^+=1$ (toggle).
   Fig. Q2(a) — JK flip-flop built from an SR latch: $S=J\overline{Q}$, $R=KQ$, 2 AND gates total.
2. Part (b) — which machine type is noise-prone. The Mealy machine is more prone to noise at its inputs. A Mealy output is a combinational function of both the present state and the current input, $Z=f(Q,X)$, so any glitch or noise spike on $X$ propagates straight through to the output asynchronously, between clock edges, producing an output glitch that was never intended by the state design. A Moore output is a function of state only, $Z=f(Q)$, updated exclusively at the clock edge — it is inherently re-synchronized every cycle and cannot react to a transient on the input line until that input has actually been clocked into the state register. This is the standard trade-off: Mealy machines can react one cycle sooner (useful for tight timing), at the cost of being sensitive to input noise; Moore machines are glitch-free on the output but one cycle slower to respond.
3. Part (c) — 2’s complement vs. sign-magnitude. Both encode an $n$-bit signed integer with the MSB indicating sign (0=positive), and both represent the same range of magnitudes for positive numbers, but they differ sharply in arithmetic and in how zero is stored.

   2’s complement vs. sign-magnitude

   Aspect	Sign-magnitude	2’s complement
   Encoding of $-x$	flip the sign bit only; magnitude bits unchanged	invert all bits of $x$, then add 1
   Representation of zero	two (+0 = 0000, −0 = 1000)	one (0000 only)
   Addition/subtraction hardware	needs separate sign logic and a magnitude comparator/subtractor	a single binary adder handles add and subtract (subtract = add the 2’s complement)
   Range, $n$ bits	$-(2^{n-1}-1)$ to $+(2^{n-1}-1)$	$-2^{n-1}$ to $+(2^{n-1}-1)$ (one extra negative value)
   Advantage	simple to read off by eye (sign + magnitude are separate fields); symmetric range	simplest possible adder/subtractor hardware; single zero; used by virtually every modern ALU
   Disadvantage	dual zero complicates comparison/overflow logic; needs dedicated add/subtract control logic	asymmetric range (one extra negative number with no positive counterpart); magnitude is not directly readable, must be recomplemented to inspect

4. Part (d) — closest binary value to 1.03. Converting each option to decimal and comparing $|value-1.03|$: option (i) $(1.01)_2=1+2^{-2}=1.25$, difference $0.220$; option (ii) $(1.0001)_2=1+2^{-4}=1.0625$, difference $0.0325$; option (iii) $(1.00001001)_2=1+2^{-5}+2^{-8}=1.03515625$, difference $\boxed{0.00516}$; option (iv) $(1.0101001)_2=1+2^{-2}+2^{-4}+2^{-7}=1.3203125$, difference $0.290$. Option (iii) has by far the smallest difference (roughly 6× closer than the next-best option (ii)), so it is the closest representation.