Integrator-Comparator Voltage-to-Time Converter: 17-Comp-A1, December 2018, Q7

Question 7: Integrator-Comparator Voltage-to-Time Converter (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. Stage 1 is an inverting integrator ($R$ into the ($-$) input, $C$ in feedback, ($+$) grounded) producing $V_x$; stage 2 is a comparator with $V_x$ on its ($-$) input and $V_{REF}$ on its ($+$) input, output $V_{OUT}$.

Given data
Quantity	Value
$R$	$10\text{k}\Omega$
$C$	$10\mu F$
$V_{IN}$	$-2\text{V (DC)}$
$V_{REF}$	$2.5\text{V}$
Counter clock	$1\text{MHz}$

Find. $V_x(t)$ sketch, its slope, the counter value at the comparator transition, and the circuit's applications/limitations.

Fig. Q7 — $V_x(t)=20t$: a linear ramp from the discharged capacitor, crossing $V_{REF}=2.5\text{V}$ at $t=125\text{ ms}$, the instant the comparator's output changes state.

Approach. Integrate the constant $V_{IN}$ to get the ramp $V_x(t)$, find its slope from $-V_{IN}/RC$, then find the time it takes $V_x$ to cross $V_{REF}$ and convert that time to clock cycles.

Part (a)/(b) — ramp and slope. With the capacitor initially discharged ($V_x(0)=0$) and a constant input, the inverting integrator gives $$V_x(t)=-\frac{1}{RC}\int_0^tV_{IN}\,d\tau=-\frac{V_{IN}}{RC}\,t$$ $$RC=(10\text{k}\Omega)(10\mu F)=0.1\text{ s}\qquad \text{slope}=-\frac{V_{IN}}{RC}=-\frac{-2}{0.1}=\boxed{+20\text{ V/s}}$$ so $V_x(t)=20t$, a linear positive-going ramp (sketched above).
Part (c) — counter value. The comparator's output changes state the instant $V_x(t)$ crosses $V_{REF}$: $$t_{\text{cross}}=\frac{V_{REF}}{\text{slope}}=\frac{2.5\text{V}}{20\text{V/s}}=\boxed{125\text{ ms}}$$ At a $1\text{MHz}$ clock, the counter accumulates $$N=t_{\text{cross}}\times f_{clk}=(0.125\text{s})(1\times10^6\text{ Hz})=\boxed{125{,}000\text{ counts}}$$
Part (d) — applications and limitations. Applications: this is the core of a single-slope (ramp) analog-to-digital converter and of general voltage-to-time (or voltage-to-frequency, if the capacitor is periodically reset) converters used in simple digital voltmeters and time-interval measurement. Limitations: accuracy depends entirely on the $RC$ product's precision and temperature stability (no self-cancelling mechanism, unlike a dual-slope converter); the capacitor must be actively reset between measurements; the input must be effectively constant (or slowly varying) during the ramp; and op-amp offset voltage/bias current add directly to the ramp's starting error and slope.

Final Results — Question 7
Quantity	Value
$RC$	$0.1\text{ s}$
Slope of $V_x(t)$	$+20\text{ V/s}$
$t_{\text{cross}}$ ($V_x=V_{REF}$)	$125\text{ ms}$
Counter value	$125{,}000$ counts

Topic: Op-amp integrator driving a comparator — a single-slope voltage-to-time converter.

Key relations: Integrator output $V_x(t)=-\dfrac{1}{RC}\displaystyle\int V_{IN}\,dt$; comparator output flips when its two input voltages cross; time-to-count $N=t\,f_{clk}$.

Why this works: A constant input integrates to an exactly linear ramp, so the time to reach a fixed reference is a direct, repeatable proxy for the input's magnitude — counting clock edges over that interval turns the analog measurement into a digital count, which is precisely how a single-slope ADC operates.

Common pitfall: Assuming the comparator's output is high at $t=0$ just because $V_x(0) (-)$"—the physically meaningful event for this circuit is the STATE CHANGE at the crossing, which is what actually stops the counter, not the instantaneous polarity at $t=0$.

Source: Sedra & Smith, Microelectronic Circuits, Op-Amp Applications (Integrators and Comparators); Signal-Generation and Waveform-Shaping Circuits.

Question 7 of 7: Integrator-Comparator Voltage-to-Time Converter

Question 7: Integrator-Comparator Voltage-to-Time Converter (20 marks)