Check — region check, not an assumption. $Q_3$'s gate and source are BOTH externally fixed ($V_i$ and $V_{SS}$), so its overdrive $V_{ov3}=V_i-V_{SS}-V_{tn}=6\text{V}$ is fixed regardless of current. If $Q_3$ were in saturation it would demand a fixed $I=\tfrac12 k_nV_{ov3}^2=180\text{ mA}$ — but solving the loop shows $Q_1$ (diode) and $Q_2$ (cascode, matching $Q_1$'s overdrive by symmetry) cannot sustain that much current while leaving $Q_3$ enough $V_{DS}$ to stay in saturation. $Q_3$ is therefore pushed into triode, and the three device equations must be solved together (done below) rather than assuming every transistor saturates.
Find. $I_{D3}$ at $V_i=2\text{V}$; $V_{DS1}$; small-signal equivalent circuit; small-signal voltage gain $v_o/v_i$.
Approach. Write each device's $I$-$V$ law referenced to its own terminals, assume $Q_1,Q_2$ saturate (diode-connected devices always do) while checking $Q_3$'s region explicitly, solve the resulting single-current-loop system, then linearise around that operating point for the AC gain.
Part (a) — solve the stack for $I$. $Q_1$ diode-connected: $I=\tfrac12k_n(V_{DD}-V_o-V_{tn})^2$, i.e. $V_o=V_{DD}-V_{tn}-V_{ov,\text{top}}$ where $V_{ov,\text{top}}=\sqrt{2I/k_n}$. $Q_2$ (gate grounded) in saturation with the SAME $k_n$ and current shares the same overdrive $V_{ov,\text{top}}$, giving $V_x=-(V_{ov,\text{top}}+V_{tn})$ — and algebraically $V_{DS2}=V_o-V_x=V_{DD}=5\text{V}$ exactly, independent of $V_{ov,\text{top}}$ (a clean consequence of this specific stack). $Q_3$'s fixed overdrive is $V_{ov3}=(V_i-V_{SS})-V_{tn}=6\text{V}$; its drain-source voltage is $V_{DS3}=V_x-V_{SS}=4-V_{ov,\text{top}}$, which is far below $V_{ov3}=6\text{V}$ for any physically sensible $V_{ov,\text{top}}$ — confirming $Q_3$ is in TRIODE. Equating $Q_1/Q_2$'s saturation current to $Q_3$'s triode current,
$$\tfrac12k_nV_{ov,\text{top}}^2=k_n\Big[V_{ov3}(4-V_{ov,\text{top}})-\tfrac12(4-V_{ov,\text{top}})^2\Big]$$
reduces (with $V_{ov3}=6$) to $V_{ov,\text{top}}^2+2V_{ov,\text{top}}-16=0$, whose positive root is $V_{ov,\text{top}}=\sqrt{17}-1=3.123\text{ V}$. Then
$$I=\tfrac12k_nV_{ov,\text{top}}^2=\tfrac12(10\text{mA/V}^2)(3.123)^2=\boxed{48.8\text{ mA}}$$
Part (b) — $V_{DS1}$. $Q_1$ is diode-connected, so $V_{DS1}=V_{GS1}=V_{ov,\text{top}}+V_{tn}=3.123+1=\boxed{4.12\text{ V}}$.
Part (c) — small-signal model. $Q_1$'s gate and drain are both AC ground ($V_{DD}$), so it contributes $g_{m1}(-v_o)+g_{ds1}(-v_o)$ into node $v_o$ from above; $Q_2$'s gate is AC ground, contributing $g_{m2}(-v_x)+g_{ds2}(v_o-v_x)$ between $v_o$ and $v_x$; $Q_3$'s gate carries $v_i$, contributing $g_{m3}v_i+g_{ds3}v_x$ into $v_x$ from below (see figure). Because no other branch loads $v_o$ or $v_x$, the SAME incremental current $i$ flows through all three:
Fig. Q2(c) — small-signal model. Each stage contributes a dependent current source plus its own gds; the stack shares one loop current between nodes vo and vx because no other branch draws current at either node.
Part (d) — small-signal gain, solving the loop. With $I=48.8\text{mA}$ at the operating point: $g_{m1}=g_{m2}=k_nV_{ov,\text{top}}=31.2\text{ mA/V}$; $g_{ds1}=g_{ds2}=I/V_A=0.488\text{ mA/V}$; for $Q_3$ in triode, $g_{m3}=k_nV_{DS3}=8.77\text{ mA/V}$ and $g_{ds3}=k_n(V_{ov3}-V_{DS3})=51.2\text{ mA/V}$ (numerically LARGER than $g_{m3}$ — being deep in triode, $Q_3$ behaves more like a voltage-controlled resistor than a transconductor here). Writing KCL at $v_o$ and $v_x$ (one shared loop current) as a $3\times3$ linear system and solving:
$$A_v=\frac{v_o}{v_i}=\boxed{-0.105\ \text{V/V}}$$
Far below the naive $-g_{m3}/g_{m1}\approx-0.28$ estimate — because $Q_3$'s large $g_{ds3}$ (triode) siphons off much of the signal current internally rather than passing it all up through the stack. This is the key teaching point of the question: always check every transistor's region before writing $g_m$-only gain expressions.
