Multiplexed seven-segment display driver (68HC11): 22-Elec-A4 Digital Systems and Computers, May 2018, Q6

Question 6: Multiplexed seven-segment display driver (68HC11) (12 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. Six common-cathode seven-segment digits, #5 (leftmost) … #0 (rightmost). Port B (address $1004) drives the seven segments a–g plus the decimal point h through a buffer, common to all displays; Port D (address $1008) selects the active digit by turning on that digit's cathode transistor (PD$k$ → display #$k$). Segment-to-bit mapping (standard, stated as an assumption): PB0=a, PB1=b, PB2=c, PB3=d, PB4=e, PB5=f, PB6=g, PB7=h (decimal point). Common cathode ⇒ a segment lights when its Port B bit is 1 and the digit's cathode is grounded.

Find. (a) an ldaa/staa sequence lighting '8' on display #0; (b) the multiplexing algorithm and Port B bit patterns to show "12.05.18" across all six digits.

Segment naming (Fig 6.2): a top, b/c right verticals, d bottom, e/f left verticals, g middle, h decimal point.

(a) Displaying '8' on display #0. The digit '8' lights every segment a–g (decimal point off), so the Port B pattern is $\mathtt{0111\,1111}_2=\mathtt{7F}_{16}$. Display #0 is selected by driving PD0 high (its transistor grounds display #0's common cathode), i.e. Port D $=\mathtt{01}_{16}$. With ldaa/staa:

; Port B = $1004 (segment data, via buffer)
; Port D = $1008 (one-hot digit select)
        LDAA  #$7F        ; '8' -> segments a..g ON, dp OFF   (0111 1111)
        STAA  $1004       ; drive all segment lines from Port B
        LDAA  #$01        ; select display #0  (PD0 = 1)
        STAA  $1008       ; digit #0 cathode grounded -> '8' lit on display #0

Check: assumes Port D is configured for output beforehand (on the 68HC11, set DDRD at $1009; Port B is output-only and needs no DDR). Also assumes the PB0→a … PB7→dp segment order above; a different wiring only relabels the constant, not the method.

(b) Showing "12.05.18" on all six digits — time multiplexing. Only one digit's cathode can be grounded at a time (all share the segment bus), so "all six at once" is achieved by persistence of vision: light each digit in turn very briefly and cycle fast enough (whole 6-digit scan repeated at ≥ ~60 Hz, i.e. each digit refreshed > ~60 times per second) that the eye fuses them into a steady display. The string "12.05.18" maps to the six digits as $1,\,2\text{.},\,0,\,5\text{.},\,1,\,8$ (decimal points after the 2 and after the second 5), assigned #5→'1', #4→'2·', #3→'0', #2→'5·', #1→'1', #0→'8'.

Algorithmic sequence (repeat forever):

Keep a 6-entry table of (segment pattern, digit-select) pairs, one per display.
For each display $i$ from #5 down to #0:
1. Load display $i$'s segment pattern and write it to Port B ($1004).
2. Write the one-hot select for display $i$ to Port D ($1008), grounding only that cathode.
3. Hold for a short dwell (~1–2 ms), then (optionally blank Port D) and advance to the next display.
After #0, wrap back to #5 and repeat continuously.

The decimal point is added by setting PB7 (add $\mathtt{80}_{16}$) in the patterns for '2·' and '5·'. The required Port B patterns are:

(b) The six displays multiplexed to read "12.05.18" (decimal points on #4 and #2).

Question 6 — Port B segment patterns (and Port D select), displays #5→#0
Display	Char	Segments on	Port B (bin)	Port B (hex)	Port D select
#5	1	b, c	0000 0110	$\mathtt{06}_{16}$	$\mathtt{20}_{16}$
#4	2 ·	a, b, g, e, d, dp	1101 1011	$\mathtt{DB}_{16}$	$\mathtt{10}_{16}$
#3	0	a, b, c, d, e, f	0011 1111	$\mathtt{3F}_{16}$	$\mathtt{08}_{16}$
#2	5 ·	a, f, g, c, d, dp	1110 1101	$\mathtt{ED}_{16}$	$\mathtt{04}_{16}$
#1	1	b, c	0000 0110	$\mathtt{06}_{16}$	$\mathtt{02}_{16}$
#0	8	a–g	0111 1111	$\mathtt{7F}_{16}$	$\mathtt{01}_{16}$

Topic: Multiplexed seven-segment displays and memory-mapped parallel output on the 68HC11.

Key relations: memory-mapped write (store to a port address drives its pins); seven-segment code (segment set → byte with PB7=dp); refresh condition (per-digit refresh $\gtrsim 50$–$60$ Hz for flicker-free viewing); one-hot digit select.

Why this works: Because all six digits share one segment bus through the buffer, they cannot be driven with independent data simultaneously; hardware economy is bought back by scanning in time. Grounding one common cathode at a time (via a Port D transistor) makes only that digit respond to the segment byte currently on Port B, and repeating the scan faster than the eye's flicker-fusion threshold makes all six appear lit together. The decimal point is just an eighth segment on PB7, so "12.05.18" costs no extra hardware — only two patterns with bit 7 set.

Common pitfall: forgetting the dwell/refresh-rate trade-off (too slow → visible flicker; too little dwell → dim), and driving Port B and Port D in the wrong order so a stale digit is briefly lit with the new segment data ("ghosting") — blank Port D while changing Port B. Also, common-cathode logic is active-high on the segments; a common-anode part would need the complemented patterns.

Source: Motorola M68HC11 Reference Manual (parallel ports B/D, DDRD); Hamacher et al., Computer Organization and Embedded Systems 6th ed. (memory-mapped I/O, device interfacing).

Question 6 of 6: Multiplexed seven-segment display driver (68HC11)

Question 6: Multiplexed seven-segment display driver (68HC11) (12 marks)