Question 1 of 5: Diode Waveshaping — Voltage Doubler
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
Paper format: National Exams, December 2014 — 07-Elec-A5 Electronics. Closed book, 3 hours; a non-communicating calculator is permitted. Answer all FIVE questions (20 marks each). Unless stated otherwise op-amps are ideal and the supplies are ±15 V.
Reference texts: A. S. Sedra & K. C. Smith, Microelectronic Circuits (7th ed., Oxford) — Ch. 3–4 (diodes, rectifiers/clamps), Ch. 7–8 (MOS amplifiers & biasing), Ch. 13–14 (CMOS logic inverter, VTC), Ch. 2 (op-amp circuits, instrumentation amplifier); R. L. Boylestad & L. Nashelsky, Electronic Devices and Circuit Theory (rectifiers, clampers).
Question 1: Diode Waveshaping — Voltage Doubler (20 marks)
Given. Sinusoidal input $v_{IN}=V_p\sin(2\pi f t)$ with peak-to-peak 10 V, so $V_p=5\text{ V}$ and $f=1\text{ kHz}$ ($T=1\text{ ms}$). Diodes assumed ideal (0.7 V drops neglected for the sketch). Part (b): $R_L=100\ \Omega$, $C_1=C_2=100\ \mu\text{F}$.
Find. The steady-state output waveform (a) open-circuit and (b) loaded, with the DC level and the ripple.
Q1: half-wave (negative) voltage doubler. D1 clamps node to a maximum of 0 V; D2 and C2 peak-detect the negative excursion.
Approach. Recognise the topology as a series capacitor + shunt diode (a clamp) feeding a series diode + shunt capacitor (a peak rectifier) — i.e. a half-wave voltage doubler. Identify the clamp polarity from D1, then the peak the detector captures, then the ripple from the load time constant.
Establish the clamp (C1–D1). D1 has its anode at the C1–D2 node and its cathode at ground, so it conducts whenever the node tries to rise above ground, pinning the node ceiling at $0$ V. In steady state $C_1$ charges to $V_p$, so the node voltage is the input shifted down by one peak: $$v_{node}(t)=V_p\sin(2\pi f t)-V_p,\qquad -2V_p\le v_{node}\le 0.$$ The node is therefore a sine clamped to a $0$ V ceiling, swinging from $-10$ V to $0$ V.
Peak-detect the negative excursion (D2–C2). D2 has its cathode toward the node and anode toward the output, so $C_2$ is charged down to the most-negative value the node reaches. That value is $-2V_p$, giving the boxed open-circuit output $$\boxed{\,v_{OUT}=-2V_p=-10\text{ V (DC, no load)}\,}.$$ The circuit is a negative voltage doubler: the magnitude of the DC output is twice the input peak.
Loaded output — ripple (part b). With $R_L$ present, $C_2$ discharges between the once-per-cycle recharge pulses. The discharge time constant is $\tau=R_LC_2=100\times100\ \mu\text{F}=10\text{ ms}$, far longer than the $T=1\text{ ms}$ period, so the decay is nearly linear and the peak-detector ripple is $$V_r\approx\frac{|v_{OUT}|\,T}{R_LC_2}=\frac{10\times1\times10^{-3}}{100\times100\times10^{-6}}=1\text{ V}.$$ The output is a 1 kHz sawtooth of about $1$ V riding on a mean of $$\boxed{\,V_{DC}\approx-\left(|2V_p|-\tfrac{V_r}{2}\right)=-9.5\text{ V}\,}.$$
Part (a) is thus a flat DC line at $-10$ V (reached within a couple of cycles of start-up); part (b) is the same level pulled down slightly and given a small 1 V sawtooth ripple by the finite load. Both sketches are shown below, with the clamped node waveform included for reference.
Q1(a) No load: node voltage is a sine clamped to a 0 V ceiling (swing -10 V to 0); C2 holds v_OUT at the -2V_p = -10 V peak (ideal).
Q1(b) With R_L=100 ohm, C2=100 uF: 1 kHz sawtooth ripple V_r ~= |V_out| T /(R_L C2) ~ 1 V about a ~ -9.5 V mean.