Common-Source Amplifier — DC Operating Point: 22-Elec-A5 Electronics, December 2014, Q4

Question 4: Common-Source Amplifier — DC Operating Point (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given.

Given data
$R_1=R_2$	100 kΩ (gate divider)	$V_{DD}$	10 V
$R_D$	6 kΩ	$R_S$	6 kΩ
$V_{TH}$	1 V	$\lambda$	0 V$^{-1}$
$K_n'(W/L)$	1 mA/V$^2$	bias current	gate current = 0 (ideal MOS gate)

Find. The DC node voltages $V_G,V_S,V_D$ and every branch current ($I_D$, and the divider current).

Q4: common-source stage with divider bias (R1,R2), drain resistor R_D and source resistor R_S. Find the DC node voltages and branch currents.

Approach. The gate draws no current, so the divider sets $V_G$; assume saturation, write $I_D$ in terms of $V_{GS}$ with the source-degeneration constraint $V_S=I_DR_S$, solve the resulting quadratic, then confirm the saturation assumption and read off the branch currents.

Gate voltage. No gate current, so the 100 k/100 k divider gives $$V_G=V_{DD}\frac{R_2}{R_1+R_2}=10\cdot\frac{100}{200}=5\text{ V},$$ and the divider branch carries $I_{div}=V_{DD}/(R_1+R_2)=10/200\text{k}=50\ \mu\text{A}.$
Saturation current with source degeneration. With $\lambda=0$, $I_D=\tfrac12 K_n'\tfrac{W}{L}(V_{GS}-V_{TH})^2$, and $V_{GS}=V_G-V_S=V_G-I_DR_S$. Substituting: $$I_D=\tfrac12(1\text{ mA/V}^2)\bigl(5-I_D\,6\text{k}-1\bigr)^2.$$
Solve the quadratic. Expanding gives $18000\,I_D^2-25\,I_D+8\times10^{-3}=0$, with roots $I_D=0.889$ mA and $I_D=0.5$ mA. The larger root forces $V_{GS}=-0.33$ V $\lt V_{TH}$ (cut-off, rejected), so $$\boxed{\,I_D=0.5\text{ mA}\,}.$$
Node voltages. $$V_S=I_DR_S=0.5\text{ mA}\times6\text{ k}\Omega=3\text{ V},\qquad V_D=V_{DD}-I_DR_D=10-0.5\times6=7\text{ V},$$ and $V_{GS}=V_G-V_S=2$ V (overdrive $V_{ov}=1$ V).
Confirm saturation. $V_{DS}=V_D-V_S=4\text{ V}$, which exceeds $V_{ov}=1\text{ V}$, so the device is indeed in saturation and the assumption holds. The drain branch carries the full $I_D=0.5$ mA.

All branch currents are now fixed: $0.5$ mA down the drain–source path (through $R_D$, $M_1$ and $R_S$) and $50\ \mu\text{A}$ through the bias divider; the gate branch carries no DC current.

Q4 DC operating point
Quantity	Value
$V_G$	5 V
$V_S$	3 V
$V_D$	7 V
$V_{GS}$ / $V_{DS}$	2 V / 4 V (saturation)
$I_D$ (drain branch)	0.5 mA
Divider current	50 µA

Topic: Four-resistor (divider) biasing of a common-source MOSFET stage.

Key relations: $V_G=V_{DD}R_2/(R_1+R_2)$; saturation $I_D=\tfrac12 k(V_{GS}-V_{TH})^2$; $V_{GS}=V_G-I_DR_S$; saturation check $V_{DS}\gt V_{GS}-V_{TH}$.

Why this works: The source resistor provides negative feedback on $I_D$ (rising $I_D$ raises $V_S$, which lowers $V_{GS}$), stabilising the operating point against device-parameter spread — the whole point of divider biasing. Because the gate draws no current, $V_G$ is set purely by the divider.

Common pitfall: Keeping the spurious quadratic root that puts the gate below threshold, or forgetting to verify $V_{DS}\gt V_{ov}$ (if it failed, the triode equation would be needed instead).

Source: Sedra & Smith, Microelectronic Circuits 7th ed., §7.4 (biasing MOS amplifier circuits).

Question 4 of 5: Common-Source Amplifier — DC Operating Point

Question 4: Common-Source Amplifier — DC Operating Point (20 marks)