NivaarExam PrepOfficial exam papers ↗

22-Elec-A5 Electronics · December 2015

Question 2 of 5: Op-Amp Limiter with a Zener in the Feedback Path

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

Paper format: National Exams, 07-Elec-A5 Electronics, December 2015 — closed book, non-communicating calculator permitted, 3 hours. Answer all FIVE questions (20 marks each). In schematics ground and chassis are common; op-amps are ideal and supplies are ±15 V unless a question states otherwise.

Reference texts: A. S. Sedra & K. C. Smith, Microelectronic Circuits, 8th ed. (diode wave-shaping & limiters Ch. 4; MOSFET amplifiers Ch. 7; BJT amplifiers Ch. 6–7; op-amp applications Ch. 2).

Question 2: Op-Amp Limiter with a Zener in the Feedback Path (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. An inverting configuration whose only feedback element is the zener D1 (anode at the output, cathode at the summing node). The input vs is a ±7.5 V triangle.

Given data
QuantityValue
R110 kΩ
D1VZ = 5 V, Vγ = 0.7 V
Slew rate0.5 V/μs
Supplies±15 V
vs±7.5 V triangle, T = 100 μs (slope 0.3 V/μs)

Find. The output waveform vo(t) with its two levels, transition timing, and slew-limited edges.

vs+−R1v−-+voD1
Figure 2.1 — vs drives the inverting node through R1; the non-inverting input is grounded; D1 is the sole feedback element from vo back to v−.

Approach. The op-amp holds its inverting input at virtual ground, so the input current $i=v_s/R_1$ must return through D1. The sign of that current decides whether the zener is forward-conducting or in reverse breakdown, which sets vo to one of two fixed levels; the slew rate then rounds the edges between them.

  1. Virtual ground and feedback current. With $v_-=0$, the resistor delivers $i=\dfrac{v_s}{R_1}$ into the summing node, and this same current must flow through D1 between $v_-$ and vo.
  2. Negative input — diode forward. For $v_s\lt 0$ the current flows from vo toward $v_-$, the forward direction (anode at vo). The output sits one forward drop above the virtual ground:
    $$v_o=v_-+V_\gamma=+0.7\ \text{V}.$$
  3. Positive input — zener breakdown. For $v_s\gt 0$ the current must flow from $v_-$ toward vo, the reverse direction for the diode. The zener holds this off until it enters reverse breakdown at VZ, clamping
    $$\boxed{v_o=-V_Z=-5\ \text{V}\ \ (v_s\gt0),\qquad v_o=+V_\gamma=+0.7\ \text{V}\ \ (v_s\lt0).}$$
    Note the two clamp levels occur on opposite half-cycles — they are not added.
  4. Timing and slew-limited edges. The output switches state each time vs crosses zero. For the ±7.5 V, 100‑μs triangle the zero crossings fall at t = 25, 75, 125, 175 μs. The full step is $\Delta v_o=0.7-(-5)=5.7$ V, so each edge takes
    $$t_\text{slew}=\frac{\Delta v_o}{SR}=\frac{5.7\ \text{V}}{0.5\ \text{V}/\mu s}=11.4\ \mu s,$$
    comfortably shorter than the 50‑μs half-period. The result is a rectangular wave between −5 V and +0.7 V with 11.4‑μs ramped transitions centred on the input zero crossings.
tV2575125175200µs+0.7−57.5-7.5vovs
Figure 2.2 — vo (blue): −5 V while vs>0, +0.7 V while vs<0, with 11.4‑μs slew edges at each input zero crossing (grey = vs).
Question 2 — results
Intervalvo
vs > 0 (zener breakdown)−5.0 V
vs < 0 (diode forward)+0.7 V
Output step5.7 V
Slew time per edge11.4 μs