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22-Elec-A5 Electronics · May 2015

Question 2 of 5: Diode Bridge Waveform Sketch

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

Paper format: National Exams, 07-Elec-A5 Electronics, May 2015 — closed book, non-communicating calculator permitted, 3 hours. Answer all FIVE questions (20 marks each). Op-amps ideal, supplies ±15 V unless a question states otherwise.

Reference texts: A. S. Sedra & K. C. Smith, Microelectronic Circuits, 8th ed. (diodes Ch. 4; MOS & BJT amplifiers Ch. 5–7; op-amp applications Ch. 2 & 13).

Question 2: Diode Bridge Waveform Sketch (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. A resistive bridge driven from $v_{IN}$ (1 kHz triangle, $\pm10$ V peak); the two output nodes $v_1$, $v_2$ are joined by $R_5$ in series with $D_1$ (anode toward $v_1$, cathode at $v_2$; ideal with $0.7$ V drop). Component values:

Given data
$R_1$$R_2$$R_3$$R_4$$R_5$$v_{IN}$
1 kΩ1.2 kΩ4.7 kΩ11 kΩ2 kΩ±10 V, 1 kHz

Find. The time waveforms of $v_1$ and $v_2$ over one period.

vvINR₁R₂R₃R₄v₁v₂R₅D₁
Q2: two dividers (R₁/R₃ and R₂/R₄) driven by v IN, cross-coupled by R₅ in series with D₁ (anode toward v₁, cathode at v₂).

Approach. With $D_1$ off the two arms are independent voltage dividers of $v_{IN}$; find each divider ratio, then determine the small window in which the $0.7$ V threshold of $R_5$–$D_1$ is exceeded and re-solve there.

  1. Divider ratios (diode off). No current flows through the $R_5$–$D_1$ branch, so $$v_1=v_{IN}\frac{R_3}{R_1+R_3}=0.825\,v_{IN},\qquad v_2=v_{IN}\frac{R_4}{R_2+R_4}=0.902\,v_{IN}.$$ Both are scaled copies of the input triangle, with peak amplitudes $8.25$ V and $9.02$ V.
  2. When does $D_1$ conduct? The branch carries current from $v_1$ to $v_2$ only when the anode leads the cathode by a diode drop, i.e. $v_1-v_2\gt 0.7$ V. Using the open-circuit values, $v_1-v_2=(0.825-0.902)v_{IN}=-0.077\,v_{IN}$, which exceeds $0.7$ V only when $$v_{IN}\lt -\frac{0.7}{0.077}=\boxed{-9.08\ \text{V}}.$$ For positive $v_{IN}$, $v_2\gt v_1$ so $D_1$ is reverse-biased; the diode matters only in a thin sliver near the negative peak.
  3. Conducting state at the negative peak. At $v_{IN}=-10$ V, solving the two node equations with $v_1-v_2=IR_5+0.7$ gives a small forward current $I\approx 18\ \mu\text{A}$ and $$v_1\approx-8.26\ \text{V},\qquad v_2\approx-9.00\ \text{V},$$ versus the un-clamped $-8.25$ V and $-9.02$ V. The diode pulls the two nodes together by only about $20\ \text{mV}$ — a barely-perceptible flattening.
  4. Resulting sketch. Over almost the entire cycle $v_1$ and $v_2$ are triangles of amplitude $8.25$ V and $9.02$ V that track the input; a tiny kink appears on both only in the interval $v_{IN}\in[-10,\,-9.08]$ V near the negative crest.
9.0-9.0000.51 msv₁v₂
Q2: v₁ (blue, ±8.25 V) and v₂ (red, ±9.02 V) are scaled triangles; D₁ conducts only for v IN < −9.08 V, giving a barely-perceptible flattening of both near the negative peak.
Question 2 results
QuantityValue
$v_1$ divider ratio / amplitude0.825 → ±8.25 V
$v_2$ divider ratio / amplitude0.902 → ±9.02 V
$D_1$ conduction window$v_{IN}\lt-9.08$ V (near −peak)
Clamped values at $v_{IN}=-10$ V$v_1=-8.26$, $v_2=-9.00$ V