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22-Elec-A5 Electronics · May 2015

Question 4 of 5: DC Bias Points of Five BJT Circuits

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

Paper format: National Exams, 07-Elec-A5 Electronics, May 2015 — closed book, non-communicating calculator permitted, 3 hours. Answer all FIVE questions (20 marks each). Op-amps ideal, supplies ±15 V unless a question states otherwise.

Reference texts: A. S. Sedra & K. C. Smith, Microelectronic Circuits, 8th ed. (diodes Ch. 4; MOS & BJT amplifiers Ch. 5–7; op-amp applications Ch. 2 & 13).

Question 4: DC Bias Points of Five BJT Circuits (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. $\beta=50$, $V_{BE,on}=V_{EB,on}=0.6$ V, $V_{CE,sat}=V_{EC,sat}=0.3$ V, $V_A=\infty$ (so $r_o=\infty$). For each part: assume forward-active, solve, then verify the region (active needs $V_{CE}\gt V_{CE,sat}$ for NPN, $V_{EC}\gt V_{EC,sat}$ for PNP); if violated, re-solve in saturation.

Find. The labelled node voltage in each of the five sub-circuits.

+5 V1 kΩVC20 kΩ+2 V
Q4(a): grounded-emitter NPN. Find V C.
+5 V100 ΩVE+2 V10 kΩ1 kΩ
Q4(b): PNP with 100 Ω to +5 V and 1 kΩ to ground. Find V E.
+5 V470 ΩVE1 kΩ-5 V
Q4(c): PNP with grounded base, 470 Ω to +5 V, 1 kΩ to −5 V. Find V E.
+5 V2 kΩVC5 kΩ1 kΩ-5 V
Q4(d): NPN, base biased to ground through 5 kΩ, split ±5 V supplies. Find V C.
+5 V100 Ω2 kΩVC1Q₂Q₁
Q4(e): cross-coupled PNP (Q₂) and NPN (Q₁). Q₂ base = V C1, Q₂ collector drives Q₁ base; Q₁ collector = V C1. Find V C1.

Approach. Each part is a one- or two-transistor DC bias problem; write the base-loop and collector-loop equations, use $I_C=\beta I_B$ (active) or the saturation drops, and check the region before quoting the answer.

  1. (a) Grounded-emitter NPN. Emitter at ground so $V_B=V_{BE}=0.6$ V. $I_B=\dfrac{2-0.6}{20\ \text{k}}=70\ \mu\text{A}$, $I_C=\beta I_B=3.5\ \text{mA}$. Then $V_C=5-I_C(1\ \text{k})=5-3.5=\boxed{1.5\ \text{V}}$. Active check: $V_C=1.5\gt V_B=0.6$ (and $I_C\lt I_{C,sat}=4.7$ mA), so the assumption holds.
  2. (b) PNP with emitter to +5 V (100 Ω) and collector to ground (1 kΩ). Assuming active gives $V_C\approx 8$ V $\gt$ 5 V, which is impossible — the transistor is saturated. With $V_E=V_B+0.6$ and $V_C=V_E-0.3$, node KCL $\big(\tfrac{4.4-V_B}{100}=\tfrac{V_B-2}{10\text{k}}+\tfrac{V_B+0.3}{1\text{k}}\big)$ gives $V_B=3.96$ V, so $$V_E=V_B+0.6=\boxed{4.56\ \text{V}}\quad(V_C=4.26\ \text{V}).$$ Saturation confirmed: $I_C=4.25\ \text{mA}\lt\beta I_B=9.8\ \text{mA}$.
  3. (c) PNP with grounded base. The base sits at 0 V, so the emitter is exactly one junction above it: $$V_E=V_{EB,on}=\boxed{0.6\ \text{V}},$$ independent of the surrounding resistors. (The device is on and in fact saturated, $V_C=0.3$ V, with $I_E=(5-0.6)/470=9.4$ mA, but $V_E$ is fixed at $0.6$ V regardless.)
  4. (d) NPN on split ±5 V supplies, base to ground through 5 kΩ. Assuming active drives $V_C$ below $V_E$ (impossible), so the transistor saturates. With $V_E=V_B-0.6$, $V_C=V_E+0.3$ and base current $I_B=-V_B/5\text{k}$, KCL $\big(\tfrac{V_B+4.4}{1\text{k}}=-\tfrac{V_B}{5\text{k}}+\tfrac{5.3-V_B}{2\text{k}}\big)$ yields $V_B=-1.03$ V, hence $$V_C=V_E+0.3=\boxed{-1.33\ \text{V}}.$$ Saturation confirmed: $I_C=3.2\ \text{mA}\lt\beta I_B=10.3\ \text{mA}$.
  5. (e) Complementary cross-coupled pair. $Q_2$ (PNP) has its emitter tied to +5 V through 100 Ω and its base tied to the same +5 V rail through $R_D=2\ \text{k}\Omega$ (the $V_{C1}$ node). With no current, both the emitter and the base of $Q_2$ float up to $+5$ V, so $V_{EB2}=0\lt0.6$ V and $Q_2$ cannot turn on. $Q_1$’s only base-drive path is $Q_2$’s collector, so $Q_1$ also stays off. With $Q_1$ off no current flows in $R_D$ and $$\boxed{V_{C1}=+5\ \text{V}}.$$

Check (part e). The two devices form a regenerative (positive-feedback) pair — the same NPN–PNP structure as an SCR. It is bistable: with a suitable trigger it would latch on, driving both into saturation with $V_{C1}\approx 0.3$ V. As drawn, however, there is no DC path to initiate conduction (the base and emitter of $Q_2$ are pulled to the same rail), so on power-up both transistors remain off and the stable, self-consistent bias is $V_{C1}=+5$ V.

Question 4 results
PartDevice / regionAnswer
(a)NPN, active$V_C=1.5$ V
(b)PNP, saturated$V_E=4.56$ V
(c)PNP, grounded base$V_E=0.6$ V
(d)NPN, saturated$V_C=-1.33$ V
(e)NPN+PNP latch, both off$V_{C1}=+5$ V