NivaarExam PrepOfficial exam papers ↗

22-Elec-A5 Electronics · May 2016

Question 1 of 5: Enhancement-Load NMOS Amplifier

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

National Exam — 07-Elec-A5 Electronics — May 2016. Closed-book; non-communicating calculator permitted; three hours. Five questions, 20 marks each — all five constitute a complete paper, so every question is solved below. Op-amps are ideal with supply rails of ±15 V unless a question states otherwise.

Reference texts (22-Elec-A5 Electronics): A. S. Sedra & K. C. Smith, Microelectronic Circuits, 7th/8th ed. (Oxford) — diodes (Ch. 4), MOSFETs and biasing (Ch. 5/7), op-amp circuits (Ch. 2), signal generators / wave-shaping (Ch. 17), MOS logic inverters (Ch. 14); R. C. Jaeger & T. N. Blalock, Microelectronic Circuit Design (McGraw-Hill).

Check / figure note: every schematic below was redrawn from the printed figures of the paper. Where the paper omits a numeric supply (Q1), the transfer curve is drawn to scale for an illustrative VDD = 5 V and the symbolic result is stated alongside.

Question 1: Enhancement-Load NMOS Amplifier (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. Driver M1 (gate = vIN, source grounded) and an enhancement load M2 whose gate and drain are tied to VDD (source at vOUT). Both devices share the same W/L (hence the same transconductance parameter K) and the same threshold $V_T=0.2\,V_{DD}$. Channel-length modulation is neglected for the transfer curve.

Find. (a) the DC transfer characteristic $v_{OUT}(v_{IN})$ and (b) the small-signal mid-band voltage gain.

V(DD)M2v(OUT)M1v(IN)
Figure 1a. Enhancement-load inverter: M2 is a saturated load (gate tied to the rail), M1 the common-source driver.

Approach. Because M2’s gate is held at VDD, it is always saturated whenever it conducts; walk the output through three regions as vIN rises, equating the drain currents of the two devices in each region, then linearise about the operating point for the gain.

  1. Load is a saturated device one threshold below the rail. With $v_{G2}=V_{DD}$ and source at $v_{OUT}$, $v_{GS2}=V_{DD}-v_{OUT}$ and $v_{DS2}=V_{DD}-v_{OUT}=v_{GS2}$, so $v_{DS2}\ge v_{GS2}-V_T$ is automatic — M2 never leaves saturation. It stops conducting when $v_{GS2}=V_T$, i.e. at $$\boxed{V_{OH}=V_{DD}-V_T=0.8\,V_{DD}}$$ which the output reaches for any $v_{IN}\lt V_T$ (driver off).
  2. Region II — both saturated (the amplifying region). For $v_{IN}\gt V_T$ the driver turns on saturated. Equating saturation currents (equal K): $\tfrac12K(v_{IN}-V_T)^2=\tfrac12K(V_{DD}-v_{OUT}-V_T)^2$. Taking the physical root, $v_{IN}-V_T=V_{DD}-v_{OUT}-V_T$, i.e. $$\boxed{v_{OUT}=V_{DD}-v_{IN}\quad(\text{slope}=-1)}$$ This straight, unity-slope segment is the heart of the transfer curve.
  3. Region-II endpoints (unity-gain points). The segment begins at $v_{IN}=V_T$ (output $=V_{OH}$) and ends when the driver enters the triode region, $v_{OUT}=v_{IN}-V_T$. Substituting $v_{OUT}=V_{DD}-v_{IN}$ gives the upper corner $$V_{IH}=\tfrac12(V_{DD}+V_T),\qquad V_{IL}=V_T.$$
  4. Region III — driver triode, load saturated. For $v_{IN}\gt V_{IH}$ set $K\!\left[(v_{IN}-V_T)v_{OUT}-\tfrac12v_{OUT}^2\right] =\tfrac12K(V_{DD}-v_{OUT}-V_T)^2$ and solve for the small $v_{OUT}$. The output does not reach zero: at $v_{IN}=V_{DD}$ (illustrative $V_{DD}=5,\;V_T=1$) it settles at $$\boxed{V_{OL}\approx1.17\ \text{V}}$$ a comparatively high logic-low — the well-known drawback of the enhancement load (a negative low-level noise margin, $NM_L=V_{IL}-V_{OL}=1-1.17=-0.17$ V here).
  5. Assemble the sketch. Flat at $V_{OH}=0.8V_{DD}$ up to $v_{IN}=V_T$; a straight slope−1 fall to the corner at $v_{IN}=\tfrac12(V_{DD}+V_T)$; then a concave tail flattening toward $V_{OL}$ (not 0). Figure 1b draws this to scale for $V_{DD}=5$ V.
  6. (b) Small-signal mid-band gain. The driver is common-source with $g_{m1}$; the load presents a small-signal resistance $1/g_{m2}$ to AC ground (its gate is at the AC-ground rail). With $\lambda=0$ the gain is $$\boxed{A_v=-\dfrac{g_{m1}}{g_{m2}}=-\sqrt{\dfrac{(W/L)_1}{(W/L)_2}}=-1}$$ since the two devices are identical and, in region II, carry equal overdrive $\Rightarrow g_{m1}=g_{m2}$. The unity magnitude is exactly the slope−1 found in step 2 — the graded insight is that this inverter’s gain is fixed by a device ratio, not by bias current.
v(IN)v(OUT)135V(OH)V(OL)slope = -1
Figure 1b. Transfer characteristic (drawn for VDD = 5 V, VT = 1 V): flat VOH = 4 V, a unity-slope amplifying region, and a high VOL ≈ 1.17 V.
Question 1 — results (illustrative VDD=5 V)
QuantityExpressionValue
Output high$V_{OH}=V_{DD}-V_T$0.8 VDD = 4 V
Lower unity-gain point$V_{IL}=V_T$1 V
Upper unity-gain point$V_{IH}=\tfrac12(V_{DD}+V_T)$3 V
Output lownumeric (driver triode)≈1.17 V
Mid-band gain$A_v=-g_{m1}/g_{m2}$−1
← Paper overview