Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
National Exam — 07-Elec-A5 Electronics — May 2016.
Closed-book; non-communicating calculator permitted; three hours. Five questions,
20 marks each — all five constitute a complete paper, so every question is
solved below. Op-amps are ideal with supply rails of ±15 V unless a
question states otherwise.
Reference texts (22-Elec-A5 Electronics): A. S. Sedra
& K. C. Smith, Microelectronic Circuits, 7th/8th ed. (Oxford)
— diodes (Ch. 4), MOSFETs and biasing (Ch. 5/7), op-amp circuits
(Ch. 2), signal generators / wave-shaping (Ch. 17), MOS logic inverters
(Ch. 14); R. C. Jaeger & T. N. Blalock,
Microelectronic Circuit Design (McGraw-Hill).
Check / figure note: every schematic below was redrawn from the printed figures of the paper. Where the
paper omits a numeric supply (Q1), the transfer curve is drawn to scale for an
illustrative VDD = 5 V and the symbolic result is
stated alongside.
Given. A 10 V-amplitude sine drives five inverting-configuration
op-amp stages (all with the non-inverting input grounded, so the summing node is a virtual
ground) whose feedback/input networks contain ideal diodes ($V_\gamma=0.7$ V);
supplies ±15 V.
Find. the output waveform of each stage over one input cycle.
Approach. Hold the inverting node at virtual ground, decide for each
half-cycle which diodes conduct (a diode that must carry reverse current is off), evaluate
the resulting inverting-amplifier law, and clamp any excursion at the ±15 V
rails.
(a) T-feedback with a mid-tap diode to ground. Input 5 kΩ
to the virtual ground; feedback is 5 kΩ–M–5 kΩ
with a diode from mid-node M to ground (anode at M). Node balance forces
$v_M=-v_{IN}$. For $v_{IN}\gt-0.7$ V the diode is off and the stage is a plain inverter
$$\boxed{v_{OUT}=-2\,v_{IN}}\quad(\text{clipping at }-15\text{ V for }v_{IN}\gt7.5\text{ V}).$$
For $v_{IN}\lt-0.7$ V the diode conducts and pins M at 0.7 V, which
opens the feedback loop; the amplifier saturates to $v_{OUT}=+15$ V for that whole
portion. The result is an inverted, −2× scaled positive-input excursion and a
+15 V rail on the negative-input excursion (Figure 5a).
(b) Anti-parallel diode–resistor input, 5 kΩ feedback.
The input branch is a 1 kΩ path (conducts on $v_{IN}\lt0$) in parallel with a
2 kΩ path (conducts on $v_{IN}\gt0$); a 5 kΩ feedback holds the loop
closed. This is a dual-slope precision rectifier with a small dead-band:
$$v_{OUT}=\begin{cases}-2.5\,(v_{IN}-0.7)&v_{IN}\gt0.7\\[2pt]0&|v_{IN}|\lt0.7\\[2pt]
+5\,(|v_{IN}|-0.7)&v_{IN}\lt-0.7\end{cases}$$
clipping at −15 V ($v_{IN}\gt6.7$ V) and +15 V ($v_{IN}\lt-3.7$ V)
(Figure 5b).
(c) Diode into a biased divider node. Input 1 kΩ to the
virtual ground; the feedback diode (anode at the node) reaches node Y, itself
pulled to +10 V by 3 kΩ and to $v_{OUT}$ by 1 kΩ. On
$v_{IN}\gt0$ the diode conducts ($v_Y=-0.7$ V) and
$$\boxed{v_{OUT}=-v_{IN}-\tfrac{10.7}{3}-0.7=-(v_{IN}+4.27)}$$
(−4.27 V at $v_{IN}=0^{+}$ down to −14.27 V at $v_{IN}=10$ V, no
clipping). On $v_{IN}\lt0$ the diode blocks, the loop opens and the output rails to
+15 V (Figure 5c).
(d) Anti-parallel diode–resistor feedback (dead-zone limiter).
Input 1 kΩ; feedback is a 3 kΩ-with-diode path (conducts on
$v_{IN}\lt0$) in parallel with a 5 kΩ-with-diode path (conducts on
$v_{IN}\gt0$). This gives two gains with a ±0.7 V cross-over offset:
$$v_{OUT}=\begin{cases}-(5\,v_{IN}+0.7)&v_{IN}\gt0\\[2pt]-3\,v_{IN}+0.7&v_{IN}\lt0\end{cases}$$
clipping at −15 V ($v_{IN}\gt2.86$ V) and +15 V ($v_{IN}\lt-4.77$ V)
(Figure 5d).
(e) Ideal battery in the feedback path. A 3 V battery (+ toward
the virtual ground) sits directly across the feedback, in parallel with 3 kΩ.
An ideal source has zero impedance, so it clamps the feedback voltage regardless of the
resistor: $v_N-v_{OUT}=3$ V with $v_N=0$ gives
$$\boxed{v_{OUT}=-3\ \text{V (constant)}}$$
a flat DC output independent of the input (Figure 5e).
Figure 5a. (a) −2× inverter for
positive input; +15 V rail for input below −0.7 V.
Figure 5b. (b) Dual-slope precision rectifier
with a ±0.7 V dead-band, clipping at the rails.
Figure 5c. (c) Biased inverter on positive
input; +15 V rail on negative input.
Figure 5d. (d) Two-slope (−5× /
−3×) rectifier with a small cross-over offset.
Figure 5e. (e) Constant −3 V output
— the battery clamps the feedback.