Two-digit seven-segment display drive and current-limit resistor: 22-Elec-A4 Digital Systems and Computers, December 2016, Q6

Question 6 (12 marks) — Two-digit seven-segment display drive and current-limit resistor

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. $V_{source}=5$ V, LED $V_F=2$ V, $V_{CE(sat)}=0.3$ V for every saturated transistor, target $I_{LED}=10$ mA. Read off the page-5 figure: $PB_6,PB_5,\ldots,PB_0$ run through open-collector inverters and $R_2$ to segment cathodes $g,f,\ldots,a$ of both digits (so $PB_6\!=\!g,\ PB_5\!=\!f,\ PB_4\!=\!e,\ PB_3\!=\!d,\ PB_2\!=\!c,\ PB_1\!=\!b,\ PB_0\!=\!a$); each common anode is fed from the 5 V rail by a PNP transistor, $T_1$ (10's digit) with its base driven from $PB_7$ through 5.1 kΩ, and $T_0$ (1's digit) with its base driven from an inverter on $PB_7$. Find. the two Port B codes, the multiplexing routine, and $R_2$.

Part (i) — segment codes. Digit ‘3’ lights $a,b,c,d,g$ (not $e,f$); digit ‘6’ lights $a,c,d,e,f,g$ (not $b$). Digit select: $T_1$ and $T_0$ are PNP (emitter arrow pointing in, emitter on the 5 V rail, 10 kΩ base pull-up), so each saturates when its base is pulled LOW. $PB_7=0$ turns on $T_1$ and lights the 10's digit; $PB_7=1$ drives the inverter output low, turns on $T_0$ and lights the 1's digit. Segments: a 1 on $PB_n$ drives the open-collector inverter output LOW, sinking current through $R_2$ and that segment's LED, so a logic 1 lights the segment. Writing the byte as $PB_7PB_6\ldots PB_0=(\text{select})\,g\,f\,e\,d\,c\,b\,a$:

‘3’ in the 10's digit ($PB_7=0$).

‘6’ in the 1's digit ($PB_7=1$).

Digit	$PB_7$	$PB_6$ ($g$)	$PB_5$ ($f$)	$PB_4$ ($e$)	$PB_3$ ($d$)	$PB_2$ ($c$)	$PB_1$ ($b$)	$PB_0$ ($a$)	Binary	Hex
‘3’ (10's)	0	1	0	0	1	1	1	1	0100 1111	0x4F
‘6’ (1's)	1	1	1	1	1	1	0	1	1111 1101	0xFD

Check (read from the figure). Both the bit order and the select polarity come from the page-5 drawing, not from a convention: $PB_6$ is wired to the $g$ cathodes and $PB_0$ to the $a$ cathodes, and $T_1$/$T_0$ are drawn as PNP switches, so $PB_7=0$ selects the 10's digit. The often-assumed order $PB_6=a\ldots PB_0=g$ with $PB_7=1$ for the 10's digit would give 0xF9/0x5F, which on this board lights the wrong segments on the wrong digit.

Part (ii) — time-multiplexing routine. Only one digit's segments are wired at a time, so the two digits are shown in fast alternation and persistence of vision fuses them into ‘36’:

Show the 10's digit. Write $0\text{x4F}$ (binary 0100 1111) to Port B ($PB_7=0$ turns on $T_1$, the 10's digit, segments for ‘3’ on).
Hold briefly. Delay ~1-5 ms so the digit is visible.
Show the 1's digit. Write $0\text{xFD}$ (binary 1111 1101) to Port B ($PB_7=1$ turns on $T_0$ through the inverter, the 1's digit, segments for ‘6’ on).
Hold briefly, then repeat the loop continuously. A refresh rate above ~50-100 Hz (both digits) removes visible flicker.

Because the digit-select line steers which display's common anode is active, the two digits never light simultaneously; rapid scanning is what makes both appear steady.

Part (iii) — series resistor. Follow one lit segment: $V_{source}\to$ saturated PNP digit driver ($T_1$ or $T_0$) $\to$ common anode $\to$ LED $\to R_2\to$ saturated open-collector inverter output $\to$ ground. Two transistors are in saturation on this path, each dropping $V_{CE(sat)}\approx0.3$ V, so:

Apply KVL around the LED branch. $V_{source}=V_{CE(sat),PNP}+V_F+I_{LED}R_2+V_{CE(sat),inv}$.
Solve for $R_2$. $$R_2=\frac{V_{source}-V_{CE(sat),PNP}-V_F-V_{CE(sat),inv}}{I_{LED}}=\frac{5-0.3-2-0.3}{0.010}=\boxed{240\ \Omega}$$ 240 Ω is itself a standard E24 value. Treating the inverter's low output as 0 V would give 270 Ω, but with both drops present only about 8.9 mA would then flow, so 240 Ω is the value that sets 10 mA with the data given.

Item	Result
(i) ‘3’ code	0100 1111 = 0x4F ($PB_7=0$)
(i) ‘6’ code	1111 1101 = 0xFD ($PB_7=1$)
(ii) Method	time-multiplex the two digits, ~50-100 Hz
(iii) $R_2$	$240\ \Omega$

Topic. Microcontroller port drive of a multiplexed seven-segment display and LED current limiting.

Key relations. KVL LED branch $V_s=V_{CE(sat)}+V_F+IR+V_{CE(sat)}$ (digit driver plus segment sink); persistence of vision fuses digits refreshed faster than ~50 Hz.

Why this works. Sharing the segment lines between digits saves I/O; a single select bit routes the segment pattern to one display at a time, and fast scanning makes both look continuously lit. The series resistor drops the surplus of the 5 V rail over the fixed LED and saturated-driver voltages to set the 10 mA.

Common pitfall. Counting only one of the two saturated transistors ($270\,\Omega$) or neither ($300\,\Omega$); assuming $PB_6=a$ when the drawing wires $PB_6$ to $g$; assuming $PB_7=1$ selects the 10's digit when the PNP driver needs a LOW base; and refreshing too slowly, which flickers, or too few digits lit at once (dimming from low duty cycle).

Source. Hamacher et al. §3 (parallel I/O ports); Sedra & Smith, Microelectronic Circuits, LED biasing; device datasheet for common-anode seven-segment displays.

Question 6 of 6: Two-digit seven-segment display drive and current-limit resistor

Question 6 (12 marks) — Two-digit seven-segment display drive and current-limit resistor