22-Elec-A5 Electronics · December 2013

Question 5 of 6: Ideal-Diode Wave-Shaping Circuits

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

Paper format. National Exams — 07-Elec-A5 Electronics, December 2013. Closed book; non-communicating calculator permitted. Six questions of 20 marks; any five constitute a complete paper — all six are solved here as a study resource. Op-amps ideal with ±15 V supplies unless stated; diode forward drop as given per question.

Reference texts. A. Sedra & K. Smith, Microelectronic Circuits, 7th ed. (Oxford) — MOS/BJT amplifiers (ch. 7–9), diode wave-shaping (ch. 4), op-amp circuits (ch. 2), CMOS logic (ch. 14). Cross-checks from C. Sadiku, Fundamentals of Electric Circuits.

Check / source notes. All 16 schematics follow the printed drawings; diode orientations are as drawn (Q5 a/b/d, Q6 b). Q2's data block is internally inconsistent (it labels the BJT NPN yet lists V_EB(on), names an R_L that is not in the drawing, and gives R_E = 1 kΩ while part (a) asks you to size R_E); assumptions used to resolve these are stated in Q2 per the exam's "state any assumptions" instruction.

Question 5: Ideal-Diode Wave-Shaping Circuits (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. v_IN=10 sinωt; diode conducts when its anode exceeds its cathode by 0.7 V, and then drops exactly 0.7 V. Find. the output level in each region and the resulting one-cycle sketch for each of (a)–(e).

Approach. For each circuit, decide the diode state (on/off) as a function of v_IN, solve the resistor network in each state, and stitch the pieces into a waveform. A series diode + DC source shifts the conduction threshold; a shunt diode + source clamps a level.

(a) Series 3 V source (+ toward input) and diode (anode at output)

Fig. 5a — the diode cathode faces the battery, anode faces the output.

Diode state. The cathode node sits at $v_{IN}-3$. Conduction ($v_{OUT}\gt v_{IN}-3+0.7$ with forward current) requires v_OUT<0, i.e. $v_{IN}\lt2.3$ V.
Levels. On: $v_{OUT}=v_{IN}-2.3$; off ($v_{IN}\gt2.3$): the 1 kΩ carries no current, $v_{OUT}=0$. So $$\boxed{v_{OUT}=\min(0,\;v_{IN}-2.3)}$$ — a clipper that passes everything below +2.3 V (shifted to 0) and holds 0 above it. Trough $=10-2.3-10=-12.3$ V at the negative peak.

Fig. 5a output: flat 0 whenever v_IN>2.3 V; else follows v_IN−2.3 down to −12.3 V.

(b) Series 3 V source (− toward input) and diode (anode at output)

Fig. 5b — same diode sense as (a) but the battery is reversed.

Diode state. Cathode node $=v_{IN}+3$; conduction requires v_OUT<0, i.e. $v_{IN}\lt-3.7$ V.
Levels. $$\boxed{v_{OUT}=v_{IN}+3.7\ (v_{IN}\lt-3.7),\qquad 0\ \text{otherwise}}.$$ Only the deep-negative tail below −3.7 V passes; trough $=-10+3.7=-6.3$ V.

Fig. 5b output: 0 except a narrow negative lobe reaching −6.3 V.

(c) Series 1 kΩ, shunt diode to ground, shunt 1 kΩ load

Fig. 5c — shunt diode (anode at output) clamps positive peaks.

Off state. With the diode off ($v_{OUT}\lt0.7$) the two 1 kΩ form a divider: $v_{OUT}=v_{IN}/2$. Valid for $v_{IN}\lt1.4$ V.
On state. For $v_{IN}\gt1.4$ V the diode clamps: $$\boxed{v_{OUT}=0.7\text{ V (clamped)},\qquad v_{OUT}=v_{IN}/2\ \text{below }1.4\text{ V}}.$$ Positive peaks are limited to +0.7 V; negative peak $=-10/2=-5$ V.

Fig. 5c output: a halved sine that flattens at +0.7 V on top, reaching −5 V at the trough.

(d) Series 3 V source (+ toward input) and diode (anode at input)

Fig. 5d — identical to (a) but the diode is reversed.

Diode state. Anode node $=v_{IN}-3$; conduction needs $(v_{IN}-3)-v_{OUT}\gt0.7$ with $v_{OUT}\gt0$, i.e. $v_{IN}\gt3.7$ V.
Levels. $$\boxed{v_{OUT}=v_{IN}-3.7\ (v_{IN}\gt3.7),\qquad 0\ \text{otherwise}}.$$ Only the top of the positive half passes; peak $=10-3.7=6.3$ V. This is the mirror image of (a).

Fig. 5d output: 0 except a positive lobe up to +6.3 V.

(e) Series 100 Ω, shunt (diode + −3 V source) to ground, shunt 1 MΩ

Fig. 5e — the diode cathode is pulled to −3 V through the battery, so it clamps the upper excursions.

Diode state. The cathode is held at −3 V; the diode (anode at output) conducts when $v_{OUT}\gt-2.3$ V, which it clamps. With the 100 Ω source resistance small, the clamp holds whenever $v_{IN}\gt-2.3$ V.
Levels. $$\boxed{v_{OUT}=-2.3\text{ V (clamped)}\ (v_{IN}\gt-2.3),\qquad v_{OUT}\approx v_{IN}\ (v_{IN}\lt-2.3)}.$$ The output sits at −2.3 V for most of the cycle and dips to −10 V only while v_IN<−2.3 V (the 1 MΩ draws negligible current).

Fig. 5e output: flat at −2.3 V, dipping to −10 V on the negative peak.

Q5 — output levels (ideal diode, 0.7 V)
Part	Behaviour	Peak	Trough
(a)	pass below +2.3 V (shifted); clip to 0 above	0 V	−12.3 V
(b)	pass below −3.7 V only; else 0	0 V	−6.3 V
(c)	halved sine, top clamped at +0.7 V	+0.7 V	−5 V
(d)	pass above +3.7 V only; else 0	+6.3 V	0 V
(e)	clamp at −2.3 V; dip with input below it	−2.3 V	−10 V

Topic. Passive diode clippers, limiters and clamps.

Key relations. Series diode + V_B: threshold shifts to $v_{IN}=V_B\pm0.7$; shunt diode + V_B: output clamps at $V_B\pm0.7$; state test = assume on, check forward current > 0.

Why this works. A series diode blocks one polarity and passes the other beyond its threshold; adding a DC source moves the threshold. A shunt diode conducts hard once its clamp level is exceeded, pinning the node there. The 0.7 V drop simply offsets each threshold.

Common pitfall. Reading the diode arrow backwards (the single biggest error in this problem — the raw extraction had three of the five reversed); and forgetting the DC-source polarity when placing the clip/clamp level.

Source. Sedra & Smith, Microelectronic Circuits, 7th ed., §4.5–4.6 (limiting and clamping circuits).

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