Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
National Exams — May 2014 · 07-Elec-A5, Electronics. Closed-book; non-communicating calculator permitted; 3 hours. Five questions, 20 marks each; op-amps ideal with ±15 V supplies unless stated. All five are solved below.
Reference texts: A. S. Sedra & K. C. Smith, Microelectronic Circuits, 7th/8th ed. (diodes & wave-shaping Ch. 4; MOS amplifiers Ch. 7; BJT amplifiers Ch. 6–7; op-amp imperfections Ch. 2); R. C. Jaeger & T. N. Blalock, Microelectronic Circuit Design.
Given. A single op-amp difference amplifier: source \(v_1\) reaches the inverting input through \(C_1\;(=\infty,\ \text{a short})\) and \(R_1\); \(R_2\) is the feedback resistor; source \(v_2\) reaches the non-inverting input through \(R_3\), and \(R_4\) returns that input to ground. Each input draws a bias current \(I_B=100\ \text{nA}\).
Find. \(R_1,R_2,R_3,R_4\) giving unity difference gain, \(R_{in}=1\ \text{M}\Omega\), and cancellation of the bias-current output offset.
Q1 - Difference amplifier: v1 enters via C1-R1 to the inverting input, R2 is feedback, v2 via R3 to the non-inverting input, R4 to ground.
Approach. Match the standard difference-amplifier transfer function to \(v_o=v_2-v_1\), then impose \(R_{in}\) and finally choose the non-inverting-side resistances so the equal bias currents produce equal (cancelling) input voltages.
Set the difference gain to unity. For the classic one-op-amp difference amplifier $$v_o=\left(1+\frac{R_2}{R_1}\right)\frac{R_4}{R_3+R_4}\,v_2-\frac{R_2}{R_1}\,v_1 .$$ Requiring the \(v_1\) coefficient to be \(1\) gives \(R_2/R_1=1\Rightarrow R_2=R_1\); the \(v_2\) coefficient then needs \(\bigl(1+1\bigr)\dfrac{R_4}{R_3+R_4}=1\Rightarrow \dfrac{R_4}{R_3+R_4}=\tfrac12\), i.e. \(\boxed{R_2=R_1,\ R_3=R_4}\).
Apply the input-resistance spec. With \(C_1\) a short and the inverting terminal held at the virtual-node potential, the resistance seen by \(v_1\) is simply \(R_1\): $$R_{in}=R_1=1\ \text{M}\Omega\;\Rightarrow\;\boxed{R_1=R_2=1\ \text{M}\Omega}.$$
Null the bias-current output offset. The two 100 nA bias currents flow out of the source resistances to ground. Their effect at the output cancels when the d.c. resistance from each input node to ground is equal: \(R_3\parallel R_4=R_1\parallel R_2\). Here \(R_1\parallel R_2=\tfrac12(1\ \text{M}\Omega)=500\ \text{k}\Omega\), and with \(R_3=R_4\) that means \(\tfrac{R_3}{2}=500\ \text{k}\Omega\Rightarrow \boxed{R_3=R_4=1\ \text{M}\Omega}\).
Confirm the residual offset. With all four resistors equal, identical bias currents develop identical voltages at the two inputs, so the differential input error is only the bias-current mismatch \(I_{OS}\) (typically a few nA), not the full 100 nA — the output offset is minimised as required.