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22-Elec-A5 Electronics · May 2014

Question 5 of 5: Diode Wave-Shaping Circuits

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

National Exams — May 2014 · 07-Elec-A5, Electronics. Closed-book; non-communicating calculator permitted; 3 hours. Five questions, 20 marks each; op-amps ideal with ±15 V supplies unless stated. All five are solved below.

Reference texts: A. S. Sedra & K. C. Smith, Microelectronic Circuits, 7th/8th ed. (diodes & wave-shaping Ch. 4; MOS amplifiers Ch. 7; BJT amplifiers Ch. 6–7; op-amp imperfections Ch. 2); R. C. Jaeger & T. N. Blalock, Microelectronic Circuit Design.

Question 5: Diode Wave-Shaping Circuits (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. A \(\pm10\ \text{V}\) sinusoid drives five diode networks; the diode is ideal with \(V_F=0.7\ \text{V}\). Find. \(v_{OUT}\) over one cycle for each.

Approach. For each circuit decide the diode state versus the instantaneous input, write the output law in each state, and find the switching threshold; d.c. batteries in series simply level-shift the node they drive.

  1. (a) Series 3 V (+ toward source), diode to output. The battery makes the diode anode node \(v_{in}-3\). The diode (anode→output) conducts only when \(v_{in}-3\gt v_{OUT}+0.7\); with the output resistor to ground this gives \(v_{OUT}=v_{in}-3.7\) once \(v_{in}\gt3.7\ \text{V}\), and \(v_{OUT}=0\) otherwise. Peak \(=10-3.7=\boxed{6.3\ \text{V}}\); the rest of the cycle is clipped to 0.
    vin+−3V1kΩvOUT1kΩ
    Q5(a)
    θ (deg)v_OUT901802703606.30
    Q5(a) - Positive peak clipper: v_OUT = v_in − 3.7 V for v_in>3.7 V, else 0. Peak +6.3 V.
  2. (b) Series 3 V (− toward source), reversed diode. The node after the battery is \(v_{in}+3\); the diode (anode at the output) conducts only when the output is pulled negative, i.e. \(v_{in}\lt-3.7\ \text{V}\), giving \(v_{OUT}=v_{in}+3.7\); elsewhere \(v_{OUT}=0\). Trough \(=-10+3.7=\boxed{-6.3\ \text{V}}\) — the negative-going companion of (a).
    vin−+3VvOUT1kΩ
    Q5(b)
    θ (deg)v_OUT901802703600−6.3
    Q5(b) - Negative peak clipper: v_OUT = v_in + 3.7 V for v_in<−3.7 V, else 0. Trough −6.3 V.
  3. (c) Series 1 kΩ, shunt (diode + 1 kΩ) and shunt 1 kΩ. When the diode is off (\(v_{in}\lt1.4\ \text{V}\)) only the 1 kΩ shunt loads the divider: \(v_{OUT}=v_{in}/2\). When it conducts (\(v_{in}\gt1.4\ \text{V}\)) the extra branch (0.7 V + 1 kΩ) is added and KCL gives \(v_{OUT}=(v_{in}+0.7)/3\). The two laws meet at 0.7 V. Positive peak \(=(10+0.7)/3=\boxed{3.57\ \text{V}}\); negative peak \(=-10/2=\boxed{-5\ \text{V}}\).
    vin1kΩvOUT1kΩ1kΩ
    Q5(c)
    θ (deg)v_OUT901802703603.570−5
    Q5(c) - v_OUT = v_in/2 (v_in<1.4 V) then (v_in+0.7)/3 (v_in>1.4 V). Range +3.57 V to −5 V.
  4. (d) Series 3 V (− toward source), diode to output. The anode node is \(v_{in}+3\); the diode conducts whenever \(v_{in}+3\gt v_{OUT}+0.7\), i.e. \(v_{in}\gt-2.3\ \text{V}\), giving \(v_{OUT}=v_{in}+2.3\); below \(-2.3\ \text{V}\) it is clipped to 0. Most of the cycle passes, shifted up by 2.3 V, with peak \(=10+2.3=\boxed{12.3\ \text{V}}\).
    vin−+3V1kΩvOUT1kΩ
    Q5(d)
    θ (deg)v_OUT9018027036012.30
    Q5(d) - Level-shifted clipper: v_OUT = v_in + 2.3 V for v_in>−2.3 V, else 0. Peak +12.3 V.
  5. (e) Series 100 Ω, shunt diode to ground and 1 MΩ. The shunt diode (anode at output) clamps the positive peaks at \(+0.7\ \text{V}\); on the negative half it is reverse biased and the 1 MΩ passes the signal essentially unattenuated, so \(v_{OUT}\approx v_{in}\) down to \(\boxed{-10\ \text{V}}\). A positive clipper.
    vin100ΩvOUT1MΩ
    Q5(e)
    θ (deg)v_OUT901802703600.70−10
    Q5(e) - Positive clipper at +0.7 V; negative half passes (~v_in). Trough −10 V.
Q5 output extremes and thresholds
CircuitLawPeak / trough
(a)\(v_{in}-3.7\) for \(v_{in}\gt3.7\), else 0+6.3 V
(b)\(v_{in}+3.7\) for \(v_{in}\lt-3.7\), else 0−6.3 V
(c)\(v_{in}/2\) then \((v_{in}+0.7)/3\)+3.57 / −5 V
(d)\(v_{in}+2.3\) for \(v_{in}\gt-2.3\), else 0+12.3 V
(e)clip at +0.7 V; else \(\approx v_{in}\)+0.7 / −10 V
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