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22-Elec-A5 Electronics: May 2017

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

  1. Question 1 Common-Source MOSFET Amplifier — Bias Design and Gain
  2. Question 2 Op-Amp Peak / Envelope Detector
  3. Question 3 Current Gain of a T-Network Feedback Stage
  4. Question 4 Two-Stage BJT DC Bias (NPN + PNP)
  5. Question 5 Diode Wave-Shaping — Five Clamper Circuits

Start with Question 1 →

National Exams — May 2017 · 16-Elec-A5, Electronics. Closed-book, 3 hours; answer all FIVE questions (20 marks each). Op-amps ideal, supplies ±15 V (Note 7).

Reference texts (22-Elec-A5 Electronics):

Check — drawing readings. Two readings of the printed schematics drive the answers: (Q1) the MOSFET source resistor $R_S$ has no bypass capacitor — the stage is a common-source amplifier with source degeneration. (Q4) the second transistor $Q_2$ is a PNP (emitter tied through $R_{E2}$ to $V_{CC}$, collector through $R_{C2}$ to ground), not an NPN.