Question 2 of 5: Bridge Rectifier Driven by a Unipolar Square Wave
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
National Exams — December 2018 · 16-Elec-A5, Electronics. Closed-book, 3 hours. Answer all FIVE (5) questions; each worth 20 marks. Unless otherwise stated, op-amps are ideal and supply rails are ±15 V; ground and chassis are common.
Reference texts: A. S. Sedra & K. C. Smith, Microelectronic Circuits, 8th ed. (Oxford) — Ch. 4 (diode circuits & rectifiers), Ch. 5–7 (MOSFET and BJT amplifiers, biasing and small-signal models), Ch. 13–14 (CMOS/enhancement-load inverters), Ch. 2 (ideal op-amps, offset and feedback). Cross-reference: R. C. Jaeger & T. N. Blalock, Microelectronic Circuit Design.
Question 2: Bridge Rectifier Driven by a Unipolar Square Wave (20 marks)
Given. A full-wave diode bridge feeding a smoothing capacitor $C$ in parallel with the load $R$. The source swings only between 0 V and +10 V (it never goes negative).
Given data — Question 2
Quantity
Value
Quantity
Value
Diode on-voltage $V_\gamma$
0.7 V
Load $R$
100 Ω
$v_{IN}$ levels
0 V / +10 V
Frequency $f$
100 Hz ($T=10$ ms)
Duty cycle
50%
Target ripple $V_r$
0.5 V
Find. (a) the output waveform and its average value; (b) the minimum smoothing capacitance; (c) the diode-$D_1$ current waveform and charging interval; (d) the average current in $D_3$.
[Figure not reproduced: Q2: full-wave bridge ($D_1$–$D_4$) with smoothing capacitor $C$ and load $R$, driven by a 0/+10 V square wave. See the official exam paper or the cited reference text.]
Q2: full-wave bridge ($D_1$–$D_4$) with smoothing capacitor $C$ and load $R$, driven by a 0/+10 V square wave.
Approach. Recognise that a bridge always inserts two diode drops, and that a purely positive input means only one diode pair ever conducts — so in time the circuit behaves as a half-wave rectifier that recharges $C$ once per period.
Peak output. On each $+10\text{ V}$ half-cycle the current path runs through two series diodes, so the capacitor charges to $$V_{pk}=v_{IN}-2V_\gamma=10-2(0.7)=\boxed{8.6\text{ V}}.$$ During that half the output is clamped flat at $8.6\text{ V}$ (the input is constant).
Discharge and average (a). When $v_{IN}$ returns to 0 V the diodes block and $C$ discharges into $R$ for the half-period $T/2$, drooping by $V_r=0.5\text{ V}$ to $8.1\text{ V}$. The output is therefore flat at $V_{pk}$ for one half and a near-linear ramp from $V_{pk}$ to $V_{pk}-V_r$ for the other, giving $$v_{O,\text{avg}}=V_{pk}-\frac{V_r}{4}=8.6-0.125=\boxed{8.475\text{ V}}.$$
Minimum capacitor (b). With a linear-droop approximation over the discharge half, $V_r\approx V_{pk}\,\dfrac{T/2}{RC}$, so $$C_{min}=\frac{V_{pk}\,(T/2)}{R\,V_r}=\frac{8.6\,(5\times10^{-3})}{100\,(0.5)}=\boxed{860\ \mu\text{F}}.$$
Diode current $i_{D1}$ (c). $D_1$ conducts only during the $+10\text{ V}$ halves. At the start of each such half a brief, tall spike recharges $C$ (this is the interval the capacitor is charging); for the rest of the half the diode carries only the load current $$I_{load}=\frac{V_{pk}}{R}=\frac{8.6}{100}=86\text{ mA}.$$ On the 0 V halves $i_{D1}=0$.
Average current in $D_3$ (d). Because $v_{IN}$ is unipolar, only the diode pair that serves the positive input ($D_1$ / $D_2$) ever conducts; the opposite pair ($D_3$ / $D_4$) is reverse biased for the whole period. Hence $$\overline{i_{D3}}=\boxed{0\text{ A}}.$$
Output $v_O(t)$: clamped at 8.6 V while $v_{IN}=+10$ V, then droops $0.5$ V (to 8.1 V) during each 0 V half.
$i_{D1}(t)$: a recharge spike (capacitor charging) followed by an 86 mA load plateau on each $+10$ V half, zero otherwise.
