Question 5 of 5

Question 5

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. Five inverting op-amp–diode shapers driven by a ±10 V sine; ideal op-amps (virtual ground at the − input, ±15 V rails); ideal diodes with a 0.7 V forward drop.

Find. The output waveform of each circuit over one input cycle, with all break levels and clip levels.

Approach. In every circuit the non-inverting input is grounded, so the − input is a virtual ground; test each diode’s state per half-cycle. Three recurring outcomes appear: a diode that removes the only feedback path opens the loop and the output rails; antiparallel diode/resistor branches give a polarity-dependent gain; and an ideal source in the feedback clamps the output.

(a) T-network with a mid-tap diode to ground

1. Diode off half. Input 5 kΩ, feedback 5 kΩ–M–5 kΩ; the mid-node satisfies $v_M=-v_{IN}$. The diode (anode at M, cathode to ground) is off while $v_M<0.7$, i.e. $v_{IN}>-0.7\ \text{V}$, giving a plain inverter $$v_{OUT}=-\frac{5\text{k}+5\text{k}}{5\text{k}}\,v_{IN}=-2\,v_{IN}\quad(\text{clips at }-15\ \text{V for }v_{IN}>7.5\ \text{V}).$$
2. Diode on half. For $v_{IN}<-0.7\ \text{V}$ the diode pins $M=+0.7\ \text{V}$, which severs v_OUT’s control of the summing node — the loop opens and the op-amp rails to +15 V.

(b) Antiparallel diode branches at the input

1. Positive input. Only the lower branch (diode + 2 kΩ) conducts; with the 5 kΩ feedback, $$v_{OUT}=-\frac{5\text{k}}{2\text{k}}\,(v_{IN}-0.7)=-2.5\,(v_{IN}-0.7),\ v_{IN}>0.7\ \text{V}\ (\text{clips }-15\ \text{V at }v_{IN}=6.7\ \text{V}).$$
2. Negative input. Only the upper branch (diode + 1 kΩ) conducts: $$v_{OUT}=-\frac{5\text{k}}{1\text{k}}\,(v_{IN}+0.7)=-5\,(v_{IN}+0.7),\ v_{IN}<-0.7\ \text{V}\ (\text{clips }+15\ \text{V at }v_{IN}=-3.7\ \text{V}).$$
3. Dead zone. For $|v_{IN}|<0.7\ \text{V}$ neither diode conducts, so $v_{OUT}=0$.

(c) Feedback diode into a +10 V-biased node

1. Positive input (diode conducts). Input 1 kΩ; the feedback diode (anode at the summing node) drives node Y, held at $V_Y=-0.7$ V; Y ties to +10 V via 3 kΩ and to v_OUT via 1 kΩ. KCL at Y gives $$v_{OUT}=-v_{IN}-\Bigl(\tfrac{10.7}{3}+0.7\Bigr)=-v_{IN}-4.27\ \text{V}\quad(v_{IN}>0),$$ ranging from −4.27 V (at 0⁺) to −14.27 V (at the +10 V peak).
2. Negative input. The diode blocks, the loop opens, and the op-amp rails to +15 V.

(d) Antiparallel diode branches in the feedback

1. Positive input. The lower feedback branch (diode + 5 kΩ) conducts: $$v_{OUT}=-\bigl(5\,v_{IN}+0.7\bigr)\quad(\text{clips }-15\ \text{V for }v_{IN}>2.86\ \text{V}).$$
2. Negative input. The upper branch (diode + 3 kΩ) conducts: $$v_{OUT}=0.7-3\,v_{IN}\quad(\text{clips }+15\ \text{V for }v_{IN}<-4.77\ \text{V}).$$

(e) 3 V source in the feedback

1. Ideal-source clamp. The 3 V battery (in parallel with 3 kΩ) sits directly between the virtual-ground summing node and v_OUT, with its + terminal at the node. An ideal source dominates the parallel resistor, so $$v_{OUT}=0-3=\boxed{-3\ \text{V}}\quad\text{for all }v_{IN}.$$ The output is a flat DC line; the 1 kΩ and 3 kΩ resistors only route the balancing current.