Question 3 of 5: Common-Source Amplifier — Gain and High-Frequency Response
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
Paper format. National Exams, December 2014 —
07-Elec-B5, Advanced Electronics. Three hours; closed book; any
non-communicating calculator permitted. Answer all FIVE (5)
questions, each worth 20 marks. The paper instructs candidates to
state clearly any assumptions made where a question admits more than one
interpretation, to start each question on a new page, and to assume that
ground and chassis are common and that op amps are ideal.
Reference texts.
A. S. Sedra and K. C. Smith, Microelectronic Circuits, 8th ed.
— the principal reference for this subject (Ch. 4 zener regulators,
Ch. 8 cascodes, Ch. 10 frequency response, Ch. 11 feedback, Ch. 17 tuned
amplifiers).
B. Razavi, Fundamentals of Microelectronics, 2nd ed. — cited
by name in Question 4 of this paper (Example 9.9, p. 405).
P. R. Gray, P. J. Hurst, S. H. Lewis and R. G. Meyer, Analysis and
Design of Analog Integrated Circuits, 5th ed. — for the differential
and feedback material.
All five questions on this paper are calculation questions built on a
circuit schematic, so each is worked in the standard
Given → Find → Figure → Approach → Steps →
Results shape. Every schematic below was redrawn from the printed figure; where the printed drawing decides an answer, the reading taken is
stated explicitly in a callout.
Question 3: Common-Source Amplifier — Gain and High-Frequency Response (20 marks)
Find. The mid-band gain with the source fully bypassed, the
mid-band gain once the bypass capacitor is removed, and the upper 3 dB
frequency of the degenerated stage.
Figure 3.1 — Common-source stage. The tail-fed drain is loaded by RL and CL; RS is bypassed by C2 in part (d) and left unbypassed in parts (e) and (f).
Approach. Recognise that the ideal bias current source is an
ac open, so the drain load is $R_L\,\|\,r_o$; get part (d) from the standard
common-source result, part (e) from the degenerated gain expression that
retains $r_o$ (essential here, since $r_o$ and $R_L$ are equal), and
part (f) from the method of open-circuit time constants with driving-point
resistances taken from the node equations rather than from an
$r_o\to\infty$ formula.
Part (d) — identify what the drain actually drives.
The bias current source feeding the drain is ideal, so it is an open circuit to
signals and contributes nothing; the drain therefore sees $R_L$ in parallel with
the transistor's own $r_o$:
$$R_{load}=R_L\,\|\,r_o=\frac{(20)(20)}{20+20}=10\ \text{k}\Omega.$$
With $C_2=\infty$ the source terminal is at ac ground, and because the gate
draws no current there is no drop across $R_i$ at mid-band, so
$v_{gs}=v_i$ exactly. Hence
$$\boxed{\frac{v_{OUT}}{v_i}=-g_m(R_L\,\|\,r_o)=-(2\ \text{mA/V})(10\ \text{k}\Omega)=-20.0}$$
Part (e) — put $R_S$ back into the signal path.
Removing $C_2$ leaves 100 Ω of unbypassed degeneration. Because $r_o$ is
the same size as $R_L$ here, the full expression must be used rather than any
$r_o\to\infty$ shortcut:
$$\frac{v_{OUT}}{v_i}=\frac{-g_m r_o R_L}{r_o+R_L+(1+g_m r_o)R_S}.$$
Substituting $g_m r_o = (2\ \text{mA/V})(20\ \text{k}\Omega)=40$,
$$\frac{v_{OUT}}{v_i}=\frac{-(2\times10^{-3})(20\times10^{3})(20\times10^{3})}{20\times10^{3}+20\times10^{3}+(41)(100)}
=\frac{-8.00\times10^{5}}{4.41\times10^{4}}$$
$$\boxed{\frac{v_{OUT}}{v_i}=-18.14}$$
so a mere 100 Ω costs about 9 percent of the gain.
Check that number against the shortcuts, and against a direct
solve. The two familiar approximations both fail here:
$-g_mR_L/(1+g_mR_S)=-33.3$ ignores $r_o$ altogether, and
$-g_m(r_o\|R_L)/(1+g_mR_S)=-16.7$ degenerates the wrong quantity. A three-node
solution of the small-signal network — gate, source and drain, with the
controlled source $g_mv_{gs}$ and $r_o$ between drain and source —
returns $-18.1406$, matching the boxed expression to every digit. The physical
reason the shortcuts miss is that $r_o$ bridges the drain to the source
node, so degeneration and output resistance interact and cannot be
handled one at a time.
Part (f) — set up the open-circuit time-constant method.
With three capacitors and no dominant pole guaranteed, the upper cut-off is
estimated as
$$f_H\approx\frac{1}{2\pi\,\tau_H},\qquad
\tau_H=R_{gs}C_{gs}+R_{gd}C_{gd}+R_{C_L}C_L,$$
where each $R$ is the resistance seen by that capacitor with the signal source
nulled and the other two capacitors open-circuited. Each is obtained by
injecting a test current between the relevant node pair and solving the same
three-node conductance matrix used in the previous step.
Evaluate the three driving-point resistances. The results
are
$$R_{gs}=18.28\ \text{k}\Omega,$$
$$R_{gd}=R_i\big(1+|A_v|\big)+R_d=20(1+18.14)+10.93=393.7\ \text{k}\Omega,$$
$$R_{C_L}=R_d=R_L\,\big\|\,\big[r_o+R_S(1+g_mr_o)\big]
=20\ \|\ 24.1=10.93\ \text{k}\Omega.$$
The middle expression is the Miller statement of $R_{gd}$: the gate–drain
capacitor sees the source resistance multiplied by one plus the stage gain, plus
the resistance at the drain. Note that the textbook degenerated form
$R_{gs}=(R_i+R_S)/(1+g_mR_S)=16.75$ kΩ is 8 percent low, again because
$r_o$ is comparable with $R_L$; the value above comes from the node equations
and is exact.
Sum the time constants and take the cut-off.
$$\tau_{gs}=(18.28\ \text{k}\Omega)(20\ \text{fF})=365.5\ \text{ps},\quad
\tau_{gd}=(393.7\ \text{k}\Omega)(5\ \text{fF})=1968.7\ \text{ps},$$
$$\tau_{C_L}=(10.93\ \text{k}\Omega)(5\ \text{fF})=54.6\ \text{ps}
\;\Rightarrow\;\tau_H=2388.9\ \text{ps}=2.389\ \text{ns},$$
$$\boxed{f_H\approx\frac{1}{2\pi(2.389\ \text{ns})}=66.6\ \text{MHz}}$$
Read the design message and check the estimate. The
smallest capacitor in the circuit, $C_{gd}$ at 5 fF, contributes 82 percent of
the whole time constant, purely because Miller multiplication makes it look
back through $R_i$ nearly twenty times over — halving $R_i$ would buy far
more bandwidth than halving $C_L$. As a check on the approximation, sweeping the
complete three-capacitor network and bisecting for the true $-3$ dB point gives
67.1 MHz, so the open-circuit estimate is 0.7 percent low, comfortably inside
its usual conservative margin.
Check: the sub-parts are lettered (d), (e), (f) on the
examination paper itself — this is the paper's own numbering carried over
from a previous question, and it is reproduced here
unchanged. The bias current source at the drain is taken as ideal (an ac open);
had it a finite output resistance it would appear in parallel with $R_L$ and
lower every gain figure.