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22-Elec-B5 Advanced Electronics · May 2016

Question 5 of 5: Shunt feedback around a common-source stage — input and output resistance

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

Paper format. National Exams, May 2016 — 07-Elec-B5 Advanced Electronics. Three hours, CLOSED BOOK; any non-communicating calculator permitted. Answer all FIVE (5) questions; all questions are worth 20 marks each. Ground and chassis are common in every schematic; op-amps are ideal and supplies are ±15 V unless a question states otherwise. Candidates are urged to state any interpretation assumption inside their answer — this solution does so in the shaded Check callouts.

Reference texts.

Check — how the schematics below were obtained. Every question on this paper carries load-bearing data that exists only in the drawing (which branch a reactance sits in, which terminal a source drives, whether a bypass capacitor is present). Where the drawing is under-specified, the reading adopted is stated in a Check callout inside that question rather than being buried in the arithmetic.

Question 5: Shunt feedback around a common-source stage — input and output resistance (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given.

QuantitySymbolValue
Drain resistorRD3 kΩ
Gate shunt resistorR220 kΩ
Feedback resistorR1∞ in (a); 100 kΩ in (b)
Bias currentIbias1 mA
Transconductance parameterK1 mA/V2
Threshold voltageVTH1 V
Channel-length modulationλ0 (ro → ∞)
Coupling / bypass capacitorsC1, CS∞

Find. RIN looking right from the vIN terminal and ROUT looking left into the vOUT terminal, first with the feedback branch removed and then with R1 = 100 kΩ closing the loop from drain to gate.

+VDDRDvOUTC1R1R2vINRINM1ROUTCSIbias−VSS
Question 5 — common-source stage with drain-to-gate shunt feedback through R1 (C1 is a short at signal frequencies). R2 shunts the gate node to ground and CS bypasses the tail source.

Approach. Recover gm from the bias, evaluate the two open-loop resistances by inspection, then close the loop: because C1 is a short, R1 bridges the drain and the gate, so RIN follows from Miller's theorem at the input and ROUT from a test source at the output.

  1. Recover the operating point. The tail source sets $I_D=I_{bias}=1$ mA, so from the square law $$V_{OV}=\sqrt{\frac{2I_{bias}}{K}}=\sqrt{\frac{2(1)}{1}}=1.414\ \text{V}, \qquad g_m=KV_{OV}=1.414\ \text{mA/V},$$ and $\lambda = 0$ makes $r_o$ infinite, so the drain sees only what is connected to it externally. CS = ∞ places the source terminal at signal ground, so the forward path is a plain common-source stage with $v_{gs}=v_{gate}$.
  2. Part (a) — input resistance with the loop open. With R1 = ∞ the only element between the vIN node and ground is R2, since the gate itself draws no current: $$R_{IN}\big|_{R_1=\infty}=R_2=\boxed{20\ \text{k}\Omega}.$$
  3. Part (a) — output resistance with the loop open. Looking back into the drain, the transistor is a current source of infinite resistance ($\lambda = 0$) and nothing else reaches the node, so $$R_{OUT}\big|_{R_1=\infty}=R_D=\boxed{3\ \text{k}\Omega}.$$ For reference the open-loop gain is $-g_mR_D=-4.24$ V/V, which is the number the feedback will act on. This completes part (a).
  4. Part (b) — find the gain across the bridged element. With C1 shorting, R1 runs directly from the drain to the gate node. Applying KCL at the drain, where the current arriving through R1 must leave through RD and the transistor, $$A=\frac{v_{OUT}}{v_{gate}} =\frac{1/R_1-g_m}{1/R_D+1/R_1} =\frac{10^{-5}-1.414\times 10^{-3}}{3.333\times10^{-4}+10^{-5}}=-4.09\ \text{V/V}.$$ The feedback resistor has pulled the stage gain down slightly from the −4.24 of step 3, both by loading the drain and by feeding a little signal forward.
  5. Part (b) — apply Miller's theorem at the input. A resistor R1 bridging a node pair of gain A appears at the input as $R_1/(1-A)$ to ground: $$\frac{R_1}{1-A}=\frac{100\ \text{k}\Omega}{1+4.090}=19.65\ \text{k}\Omega.$$ That image sits in parallel with R2, so $$R_{IN}=R_2\parallel\frac{R_1}{1+|A|} =20\parallel 19.65=\boxed{9.91\ \text{k}\Omega},$$ roughly half the open-loop value — the signature of shunt sampling at the input, which always lowers RIN.
  6. Part (b) — output resistance. To measure ROUT the independent input source is set to zero. vIN is drawn as an ideal voltage source connected directly to the gate node, so killing it holds the gate at signal ground; then $v_{gs}=0$, the controlled source is dead, and the test source at the drain sees only two resistors to ground: $$R_{OUT}=R_D\parallel R_1=\frac{(3)(100)}{103}=\boxed{2.91\ \text{k}\Omega}.$$
  7. Say what that result does and does not mean. The 3 % reduction is pure resistive loading, not loop action: an ideal voltage source sitting on the summing node holds it rigid and so opens the shunt loop for this measurement. If instead the stage is driven from a current (Norton) source — the drive a shunt–shunt topology is designed for — the gate is free to move, the loop stays active, and a test source at the drain sees $$R_{OUT}'=\left[\frac{1}{R_D}+\frac{1}{R_1+R_2}+\frac{g_mR_2}{R_1+R_2}\right]^{-1}=1.73\ \text{k}\Omega,$$ a genuine 42 % reduction produced by the feedback. Both figures are reported below.
  8. Cross-check the limits. Letting $R_1\rightarrow\infty$ in the part (b) expressions returns $A\rightarrow -g_mR_D=-4.24$, $R_{IN}\rightarrow R_2=20$ kΩ and $R_{OUT}\rightarrow R_D=3$ kΩ — exactly the part (a) answers, so the two parts are consistent. A full three-node solve of the closed-loop circuit reproduces 9.911 kΩ and 2.913 kΩ to four figures.

Final Results

PartQuantityResult
—Overdrive and transconductanceVOV = 1.414 V, gm = 1.414 mA/V
(a)RIN, R1 = ∞20.0 kΩ
(a)ROUT, R1 = ∞3.00 kΩ
(b)Gain across the feedback element, A−4.09 V/V
(b)RIN, R1 = 100 kΩ9.91 kΩ
(b)ROUT, R1 = 100 kΩ (ideal voltage drive)2.91 kΩ
(b)ROUT if driven from a current source1.73 kΩ

Check — the drive impedance decides ROUT. The figure shows vIN arriving at the junction of R1, R2 and the gate, with RIN measured to the right of that terminal — i.e. this is shunt–shunt (voltage-sampling, current-mixing) feedback whose input port is the gate itself. Taken literally, the source is an ideal voltage generator, so zeroing it for the output measurement grounds the summing node and suspends the loop; that gives ROUT = RD||R1 = 2.91 kΩ, quoted as the primary answer because it is what the circuit as drawn does. The value a shunt–shunt analysis is usually meant to demonstrate, 1.73 kΩ, requires a finite (ideally infinite) source resistance and is given alongside. RIN = 9.91 kΩ is unaffected by this distinction, and both readings collapse correctly onto part (a) as R1 → ∞.

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