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22-Elec-B5 Advanced Electronics · December 2017

Question 1 of 5: Bipolar Cascode Current Source — Output Resistance and Output Compliance

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

Paper format. National Exams December 2017, 16-Elec-B5 Advanced Electronics — 3 hours, CLOSED BOOK, one approved Casio or Sharp calculator. Five questions, all to be answered, 20 marks each (100 marks total). In schematics ground and chassis are common; op-amps are ideal and supply rails are ±15 V unless stated otherwise. Candidates are instructed to state any interpretive assumption inside the answer, and to provide block diagrams and schematics wherever an essay-format response needs them.

Reference texts. A. S. Sedra and K. C. Smith, Microelectronic Circuits, 8th ed. (Ch. 7 transistor amplifiers, Ch. 8 cascodes and current mirrors, Ch. 10 frequency response, Ch. 11 feedback); B. Razavi, Fundamentals of Microelectronics, 2nd ed. (Ch. 9 cascode stages and current mirrors) and Design of Analog CMOS Integrated Circuits, 2nd ed. (Ch. 6 frequency response); R. C. Jaeger and T. N. Blalock, Microelectronic Circuit Design, 5th ed. (Ch. 17 low-frequency response); P. R. Gray, P. J. Hurst, S. H. Lewis and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th ed. (Ch. 8 feedback).

How each answer is laid out. Every calculation question states its data, the quantity sought, the circuit as drawn on the paper, a one-line strategy, then numbered steps with the governing relation, the substitution and the intermediate result. Boxed values are the answers a marker looks for, and each question closes with a results table and a concept note.

Question 1: Bipolar Cascode Current Source — Output Resistance and Output Compliance (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given.

QuantityValue
Current gain$\beta = 100$
Turn-on base–emitter voltage$V_{BE(on)} = 0.7\ \text{V}$
Early voltage$V_A = 100\ \text{V}$
Saturation voltage$V_{CE(sat)} = 0.3\ \text{V}$
Thermal voltage$V_T = 25\ \text{mV}$
Supply$V_{CC} = 10\ \text{V}$
Cascode base bias$V_{bias} = 3\ \text{V}$
Reference current$I_{bias} = 10\ \text{mA}$
+V CCI biasQ 1Q 2Q 3v EV biasv xi xR O = v x / i x
Q1 as drawn on the paper: $Q_1$–$Q_2$ form a diode-connected current mirror carrying $I_{bias}$, and $Q_3$ sits on top of $Q_2$ as a cascode device with its base held at $V_{bias}$. The output terminal is the collector of $Q_3$, where the test source $v_x$ drives the current $i_x$ that defines $R_O$; $v_E$ marks the internal node between the collector of $Q_2$ and the emitter of $Q_3$.

Find. (a) the small-signal resistance $R_O = v_x/i_x$ looking back into the output terminal, and (b) the lowest DC level that may be applied to $v_x$ before the current source stops behaving as one.

Approach. Fix the operating current from the mirror, convert it into the hybrid-$\pi$ parameters of $Q_2$ and $Q_3$, run a driving-point analysis at the collector of $Q_3$ (a common-base stage degenerated by the output resistance of $Q_2$), then read the compliance limit off the two saturation constraints that the fixed base bias imposes.

  1. Part (a) — fix the bias current from the mirror. $Q_1$ is diode-connected and swallows the reference, so with matched devices the mirror copies it into $Q_2$. $Q_3$ is in series with $Q_2$, so the same current flows through the whole stack: $$I_{C1} = I_{C2} = I_{bias} = 10\ \text{mA}, \qquad I_{C3} \simeq I_{E3} = I_{C2} = 10\ \text{mA}.$$ Every small-signal parameter below is therefore evaluated at 10 mA.
  2. Convert the operating point into hybrid-$\pi$ parameters. The transconductance, base input resistance and Early resistance follow directly from the operating current: $$g_{m3} = \frac{I_{C3}}{V_T} = \frac{10\ \text{mA}}{25\ \text{mV}} = 400\ \text{mA/V}, \qquad r_{\pi 3} = \frac{\beta}{g_{m3}} = \frac{100}{0.4} = 250\ \Omega,$$ $$r_{o2} = r_{o3} = \frac{V_A}{I_C} = \frac{100\ \text{V}}{10\ \text{mA}} = 10\ \text{k}\Omega.$$ The 250 Ω value of $r_{\pi 3}$ is the number that decides this question, so it is worth noting how small it is beside $r_{o2}$.
  3. Set up the driving-point analysis at the output node. Drive the collector of $Q_3$ with $v_x$ and look for $i_x$. Seen from the emitter of $Q_3$, the mirror presents $r_{o2}$ to ground; the base of $Q_3$ is an AC ground, so $r_{\pi 3}$ appears in parallel with it. Writing KCL at the emitter node and eliminating $v_{\pi 3}$ gives the classic degenerated common-emitter result $$\boxed{\;R_O = r_{o3}\bigl[\,1 + g_{m3}\,(r_{\pi 3}\,\|\,r_{o2})\,\bigr] + (r_{\pi 3}\,\|\,r_{o2})\;}$$ in which the bracketed factor is the boost the cascode buys over a bare mirror.
  4. Evaluate the degeneration resistance seen at the emitter of $Q_3$. Because $r_{\pi 3}$ is two orders of magnitude smaller than $r_{o2}$ it dominates the parallel pair, and that is exactly what limits the achievable boost: $$r_{\pi 3}\,\|\,r_{o2} = \frac{250 \times 10{,}000}{250 + 10{,}000} = 243.9\ \Omega .$$
  5. Put the numbers into the boxed expression. The loop gain around the cascode device is $g_{m3}(r_{\pi 3}\|r_{o2}) = 0.4 \times 243.9 = 97.56$, so $$R_O = 10\ \text{k}\Omega \times (1 + 97.56) + 243.9\ \Omega = 985{,}610 + 244 \approx \boxed{\,986\ \text{k}\Omega\,}$$ i.e. very nearly 1 MΩ, against the 10 kΩ a plain mirror would offer — a hundred-fold improvement.
  6. Check the answer against the ceiling that a bipolar cascode cannot cross. Since $r_{\pi 3}\|r_{o2} \le r_{\pi 3}$ and $g_{m3}r_{\pi 3} = \beta$, the boxed expression can never exceed $\beta r_{o3} = 100 \times 10\ \text{k}\Omega = 1.00\ \text{M}\Omega$. The computed 986 kΩ sits just under that ceiling, which is the signature of a correct answer. Dropping $r_{\pi 3}$ — the standard slip — would give $r_{o3}(1 + g_{m3}r_{o2}) = 40.0\ \text{M}\Omega$, forty times above a limit that no bipolar cascode can pass, and that impossibility is how the error is caught.
  7. Part (b) — pin the internal node from the fixed base bias. The base of $Q_3$ is held at $V_{bias}$, so its emitter sits one diode drop below: $$V_E = V_{bias} - V_{BE(on)} = 3.0 - 0.7 = 2.3\ \text{V}.$$ That is also $V_{CE2}$, and since $2.3\ \text{V} \gg V_{CE(sat)} = 0.3\ \text{V}$ the mirror transistor $Q_2$ is comfortably active and never becomes the binding constraint.
  8. Impose the saturation limit on the cascode device. $Q_3$ remains in the forward-active region only while its own collector–emitter voltage stays above $V_{CE(sat)}$, so the output terminal may not be pulled below $$v_{x,\min} = V_E + V_{CE(sat)} = V_{bias} - V_{BE(on)} + V_{CE(sat)} = 2.3 + 0.3 = \boxed{\,2.60\ \text{V}\,}$$ Below this the collector junction forward-biases, $R_O$ collapses and the branch current falls away from 10 mA. The usable compliance window is therefore $2.60\ \text{V} \le v_x \le V_{CC}$, i.e. 7.4 V of swing — the price paid for the hundred-fold gain in $R_O$, and the reason a designer keeps $V_{bias}$ only as high as the cascode actually needs.

the collector of $Q_3$ is the terminal carrying $v_x$ and $i_x$, and only $I_{bias}$ hangs from the supply. That is the only reading under which part (a) has 14 marks' worth of work in it, since a device whose collector is tied to the rail has no output node at all. (2) The headline numbers assume an ideal mirror. Charging the two base currents to the reference gives $I_{C1} = I_{C2} = I_{bias}\beta/(\beta+2) = 9.80$ mA and $I_{C3} = \alpha I_{E3} = 9.71$ mA, which raises $R_O$ to 1.015 MΩ — 3.0 % higher and still under the $\beta r_{o3}$ ceiling. Both readings are defensible under the paper's own instruction 1; the 986 kΩ figure is quoted because a ±20 % Early-voltage tolerance swamps a 3 % mismatch correction.

QuantityValue
Mirror / cascode branch current$I_{C1}=I_{C2}=I_{C3} = 10\ \text{mA}$
Transconductance of $Q_3$$g_{m3} = 400\ \text{mA/V}$
Base input resistance of $Q_3$$r_{\pi 3} = 250\ \Omega$
Early resistance (each device)$r_{o2} = r_{o3} = 10\ \text{k}\Omega$
Emitter degeneration seen by $Q_3$$r_{\pi 3}\|r_{o2} = 243.9\ \Omega$
Cascode boost factor$1 + g_{m3}(r_{\pi 3}\|r_{o2}) = 98.6$
(a) Output resistance$\mathbf{R_O \approx 986\ \text{k}\Omega}$
Theoretical ceiling$\beta r_{o3} = 1.00\ \text{M}\Omega$
Internal node voltage$V_E = 2.30\ \text{V}$
(b) Minimum output voltage$\mathbf{v_{x,\min} = 2.60\ \text{V}}$
Compliance window$2.60\ \text{V} \le v_x \le 10\ \text{V}$
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