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22-Elec-B5 Advanced Electronics · May 2017

Question 2 of 5: Series–Shunt Feedback Amplifier — Feedback Factor, Loop Gain and Closed-Loop Gain

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

Paper format. National Exams May 2017, 16-Elec-B5 Advanced Electronics — 3 hours, CLOSED BOOK, one approved Casio or Sharp calculator. Five questions, all to be answered, 20 marks each (100 marks total). In schematics ground and chassis are common; op-amps are ideal and supply rails are ±15 V unless stated otherwise. Candidates are instructed to state any interpretive assumptions inside the answer.

Reference texts. A. S. Sedra and K. C. Smith, Microelectronic Circuits, 8th ed. (differential and multistage amplifiers, Ch. 9; frequency response, Ch. 10; feedback, Ch. 11; oscillators, Ch. 18); B. Razavi, Design of Analog CMOS Integrated Circuits, 2nd ed. (Ch. 4 differential amplifiers, Ch. 9 cascodes) and Fundamentals of Microelectronics, 2nd ed. (Example 9.9, the bipolar cascode); P. R. Gray, P. J. Hurst, S. H. Lewis and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th ed. (Ch. 8 feedback).

Question 2: Series–Shunt Feedback Amplifier — Feedback Factor, Loop Gain and Closed-Loop Gain (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. A two-stage MOSFET amplifier in which the signal enters the gate of $M_1$, the drain of $M_1$ drives the gate of $M_2$, and the output at the drain of $M_2$ is returned through $R_2$ to the source of $M_1$, where $R_1$ completes the path to ground:

Question 2 — given data
QuantitySymbolValue
Transconductances$g_{m1} = g_{m2}$4 mA/V (part d)
Drain loads$R_{D1} = R_{D2}$10 k$\Omega$ (part d)
Lower divider resistor$R_1$1 k$\Omega$ (part b)
Target ideal closed-loop gain$1/\beta$10 V/V (part b)
Device output resistances$r_{o1}$, $r_{o2}$neglected, as instructed
Source resistance$R_{sig}$zero (ideal $v_S$ in series with $V_{GG}$)

Find. the identity of the feedback network and expressions for $\beta$, for the ideal closed-loop gain and for the loop gain $A\beta$; the divider ratio that sets an ideal gain of 10 V/V; and the numerical values of $A\beta$, $A$ and $A_f$ for the stated device data.

+VDDRD1M1RD2M2vOR2R1vS+−VGG
Question 2 — two common-source stages inside a voltage-series (series–shunt) loop. $R_2$ samples $v_O$ in shunt and $R_1$ returns the sampled fraction in series with the gate–source loop of $M_1$.

Approach. Identify the sampling and mixing topology, read $\beta$ off the feedback divider, load the basic amplifier with the two-port terminations of that divider to build the $A$ circuit, then combine $A$ and $\beta$ in the standard feedback expressions.

  1. Part (a) — identify the topology and the $\beta$ network. The output voltage $v_O$ is sampled by connecting $R_2$ directly across the output node (shunt sampling), and the sampled signal is returned as a voltage in series with the gate–source loop of $M_1$ by lifting its source above ground (series mixing). The feedback network is therefore nothing more than the resistive divider formed by $R_2$ and $R_1$, tapped at the source of $M_1$, and it delivers$$\beta = \frac{v_f}{v_O} = \frac{R_1}{R_1+R_2}$$Because the loop is voltage-series it stabilises a voltage gain, raises the input resistance and lowers the output resistance.
  2. State the ideal closed-loop gain. When the loop gain is large, $A_f = A/(1+A\beta) \to 1/\beta$, so the upper bound the topology can approach is$$A_f\big|_{\text{ideal}} = \frac{1}{\beta} = \boxed{1 + \frac{R_2}{R_1}}$$which is the familiar non-inverting-amplifier form. It depends only on a resistor ratio, which is precisely the benefit the feedback is bought for.
  3. Part (b) — choose the divider ratio. Setting the ideal gain to 10 V/V,$$1 + \frac{R_2}{R_1} = 10 \;\Longrightarrow\; \frac{R_2}{R_1} = 9$$and with $R_1 = 1\ \text{k}\Omega$ this gives $\boxed{R_2 = 9\ \text{k}\Omega}$, so $\beta = 0.1$.
  4. Part (c) — build the $A$ circuit by loading with the feedback two-port. The divider must be accounted for twice. Looking into the divider from the mixing point with the output shorted gives a resistance $R_1\parallel R_2$, which appears in the source of $M_1$ and degenerates the first stage; looking in from the output with the input loop opened gives $R_1+R_2$, which appears in shunt with $R_{D2}$. The first stage is then a degenerated common-source stage and the second a plain common-source stage, so$$A = \frac{v_O}{v_i} = \left[\frac{g_{m1}R_{D1}}{1+g_{m1}(R_1\parallel R_2)}\right]\Big[g_{m2}\left(R_{D2}\parallel (R_1+R_2)\right)\Big]$$(the two inversions cancel, so $A$ is positive, as it must be for negative feedback).
  5. Write the loop gain. Multiplying by the feedback factor,$$A\beta = \left[\frac{g_{m1}R_{D1}}{1+g_{m1}(R_1\parallel R_2)}\right]\Big[g_{m2}\left(R_{D2}\parallel (R_1+R_2)\right)\Big]\frac{R_1}{R_1+R_2}$$and the closed-loop gain follows as $A_f = A/(1+A\beta)$.
  6. Part (d) — insert the numbers, starting with the loading resistances. With $R_1 = 1\ \text{k}\Omega$ and $R_2 = 9\ \text{k}\Omega$,$$R_1\parallel R_2 = 0.9\ \text{k}\Omega, \qquad R_1+R_2 = 10\ \text{k}\Omega$$so the second stage sees $R_{D2}\parallel(R_1+R_2) = 10\parallel 10 = 5\ \text{k}\Omega$.
  7. Evaluate the two stage gains. The degeneration of the first stage is substantial, $g_{m1}(R_1\parallel R_2) = (4\ \text{mA/V})(0.9\ \text{k}\Omega) = 3.6$:$$|A_1| = \frac{(4)(10)}{1+3.6} = 8.70, \qquad |A_2| = (4\ \text{mA/V})(5\ \text{k}\Omega) = 20.0$$Multiplying, $A = 8.70 \times 20.0 = 173.9$ V/V.
  8. Close the loop. With $\beta = 0.1$,$$A\beta = (173.9)(0.1) = 17.39, \qquad A_f = \frac{A}{1+A\beta} = \frac{173.9}{18.39} = \boxed{9.46\ \text{V/V}}$$The amount of feedback is $1+A\beta = 18.4$, so the realised gain falls 5.4 per cent short of the ideal 10 V/V — the unavoidable gain error of a loop whose loop gain is only about 17.
  9. Cross-check against a direct nodal solution. Solving the three unknown node voltages of the actual circuit (source of $M_1$, drain of $M_1$, output) without invoking feedback theory at all returns $v_O/v_S = 9.458$ V/V, within 0.02 per cent of the value obtained above. That agreement is the evidence that the two-port loading has been applied correctly, since omitting either termination shifts $A$ by tens of per cent.

Check: the analysis follows the exam's own instruction to neglect $r_{o1}$ and $r_{o2}$, and it treats the source $v_S$ as ideal, so no $R_{sig}$ appears in the input loop. It also neglects the small forward transmission through $R_2$ (the feedback network's $h_{12}$ path), which is the standard two-port approximation; the exact nodal solution quoted in the last step confirms that this costs less than 0.1 per cent here.

Final results
QuantitySymbolResult
Feedback network—the $R_2$–$R_1$ divider, tapped at the source of $M_1$
Feedback factor$\beta$$R_1/(R_1+R_2) = 0.1$
Ideal closed-loop gain$1/\beta$$1+R_2/R_1 = 10$ V/V
Divider ratio for 10 V/V$R_2/R_1$9
Feedback resistor$R_2$9 k$\Omega$
Input-side loading$R_1\parallel R_2$0.9 k$\Omega$
Output-side loading$R_1+R_2$10 k$\Omega$
Open-loop gain$A$173.9 V/V
Loop gain$A\beta$17.39
Closed-loop gain$A_f$9.46 V/V (exact nodal solve 9.458 V/V)