22-Elec-B5 Advanced Electronics · May 2017
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Paper format. National Exams May 2017, 16-Elec-B5 Advanced Electronics — 3 hours, CLOSED BOOK, one approved Casio or Sharp calculator. Five questions, all to be answered, 20 marks each (100 marks total). In schematics ground and chassis are common; op-amps are ideal and supply rails are ±15 V unless stated otherwise. Candidates are instructed to state any interpretive assumptions inside the answer.
Reference texts. A. S. Sedra and K. C. Smith, Microelectronic Circuits, 8th ed. (differential and multistage amplifiers, Ch. 9; frequency response, Ch. 10; feedback, Ch. 11; oscillators, Ch. 18); B. Razavi, Design of Analog CMOS Integrated Circuits, 2nd ed. (Ch. 4 differential amplifiers, Ch. 9 cascodes) and Fundamentals of Microelectronics, 2nd ed. (Example 9.9, the bipolar cascode); P. R. Gray, P. J. Hurst, S. H. Lewis and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th ed. (Ch. 8 feedback).
Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.
Given. An op-amp in the non-inverting configuration set by $R_1$ and $R_2$, with positive feedback taken from the output through a series arm $Z_s$ (a capacitor $C$ in series with a resistor $R$) to the non-inverting input, which is returned to ground by a parallel arm $Z_p$ ($2R$ in parallel with $2C$):
| Quantity | Symbol | Value |
|---|---|---|
| Series feedback arm | $Z_s$ | $R$ in series with $C$ |
| Parallel feedback arm | $Z_p$ | $2R$ in parallel with $2C$ |
| Gain-setting resistors | $R_1$, $R_2$ | $R_1$ to ground, $R_2$ from output to the inverting input |
| Amplifier | — | ideal op-amp, non-inverting connection, gain $1+R_2/R_1$ |
Find. the oscillation frequency in terms of $R$ and $C$, the condition on $R_2/R_1$ that guarantees start-up, the principal shortcoming of the circuit as drawn, and a practical fix.
Approach. Apply the Barkhausen criterion to the loop formed by the non-inverting amplifier and the $Z_s$–$Z_p$ divider: the frequency follows from the zero-phase condition on the divider, and the start-up condition from the magnitude condition at that frequency.
Main limitation. The circuit has no amplitude control. The gain that sustains the oscillation is set by a fixed resistor ratio, and the condition $A\beta = 1$ is a knife edge that no combination of real components holds. If the ratio drifts even slightly low — through resistor tolerance, temperature, or the op-amp's own finite open-loop gain at $f_{osc}$ — the poles move into the left half-plane and the oscillation dies away. If it drifts slightly high, the amplitude grows exponentially until the op-amp output runs into its supply rails, and the only thing that finally limits it is saturation. The waveform is then a clipped sinusoid with high harmonic distortion, and because the clipping level tracks the supply, the amplitude also depends on the rails rather than on anything the designer chose. In short, the circuit either stops or distorts, and the useful in-between state is not stable.
Remedy. Make the gain amplitude-dependent, so that the loop finds its own equilibrium. The simplest form is a non-linear limiter across $R_2$: two Zener diodes connected back to back (or a diode–resistor network) conduct only once the output exceeds a chosen level, shunting $R_2$ and reducing the gain at exactly the amplitude at which $A\beta$ falls back to unity. The design then sets $R_2/R_1$ a little above 2.5 so that the loop starts reliably, and lets the limiter pull it back to 2.5 once the desired output level is reached. Classical alternatives replace $R_1$ or $R_2$ with a temperature-sensitive element whose resistance rises with the current through it — a small incandescent lamp or a positive-temperature-coefficient thermistor in the $R_1$ position was the original Hewlett solution — or place a JFET operating in its triode region in the $R_1$ branch and drive its gate from a peak detector, giving a genuine automatic gain control loop. All three do the same job: they convert a marginally stable linear circuit into one with a stable limit cycle, at the price of a little distortion introduced by the non-linearity itself. The AGC approach gives the lowest distortion because the controlling element stays linear over each cycle; the Zener limiter is the cheapest and is what most exam answers are expected to describe.
| Quantity | Symbol | Result |
|---|---|---|
| Oscillation frequency | $f_{osc}$ | $1/(4\pi RC)$, i.e. $\omega_0 = 1/(2RC)$ |
| Divider transmission at $\omega_0$ | $\beta$ | 2/7 = 0.2857 |
| Required amplifier gain | $1+R_2/R_1$ | $\ge 3.5$ |
| Start-up condition | $R_2/R_1$ | $\ge 2.5$ (slightly greater in practice) |
| Illustration: $R = 10$ k$\Omega$, $C = 10$ nF | $f_{osc}$ | 796 Hz |
| Main limitation | — | no amplitude control: dies out or clips at the rails |
| Remedy | — | non-linear limiter across $R_2$ (back-to-back Zeners), lamp/thermistor in $R_1$, or a JFET-based AGC loop |