Question 3 of 5: Lower Cutoff Frequency of a Common-Emitter Amplifier — Coupling and Bypass Capacitor Design

Question 3: Lower Cutoff Frequency of a Common-Emitter Amplifier — Coupling and Bypass Capacitor Design (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. A resistively biased common-emitter stage with a source coupling capacitor, an output coupling capacitor and an emitter bypass capacitor:

Find. values of $C_{C1}$, $C_{C2}$ and the emitter bypass capacitor that place the −3 dB lower corner at 100 Hz, and a statement of which capacitor controls that corner.

Approach. Use the method of short-circuit time constants: find the resistance each capacitor sees with the other two shorted, sum the reciprocal time constants to obtain $\omega_L$, then allocate that budget deliberately so that one capacitor sets the corner and the other two sit a decade below it.

1. Reduce the bias network to a single resistance. $R_{B1}$ returns to $+V_{CC}$, which is a signal ground, so the two bias resistors appear in parallel at the base:$$R_B = R_{B1}\parallel R_{B2} = \frac{(180)(270)}{180+270} = 108\ \text{k}\Omega$$Since $r_{\pi} = 2.5\ \text{k}\Omega$ is far smaller, the base node is dominated by the transistor, not by the divider.
2. Resistance seen by the input coupling capacitor. With $C_{C2}$ and the emitter capacitor shorted, $C_{C1}$ looks into $R_S$ in series with the parallel combination of the bias network and the base input resistance:$$R_{C1} = R_S + (R_B\parallel r_{\pi}) = 5 + \frac{(108)(2.5)}{108+2.5} = 5 + 2.443 = 7.443\ \text{k}\Omega$$
3. Resistance seen by the output coupling capacitor. Looking back into the collector of a bipolar transistor with $r_o$ neglected gives an open circuit, so $C_{C2}$ simply sees the two resistors it joins:$$R_{C2} = R_C + R_L = 8 + 5 = 13\ \text{k}\Omega$$
4. Resistance seen by the emitter capacitor. Looking up into the emitter, the base circuit is divided by $(\beta+1)$, and that appears in parallel with $R_E$:$$R_{CE} = R_E \parallel \frac{r_{\pi} + (R_S\parallel R_B)}{\beta+1} = 2000 \parallel \frac{2500 + 4779}{101} = 2000 \parallel 72.1 = 69.6\ \Omega$$This is two orders of magnitude below the other two resistances, which already tells us which capacitor will be the awkward one.
5. Set the frequency budget. The short-circuit time constant method estimates the lower corner as the sum of the individual pole frequencies,$$\omega_L \approx \frac{1}{R_{C1}C_{C1}} + \frac{1}{R_{C2}C_{C2}} + \frac{1}{R_{CE}C_{E}} = 2\pi(100) = 628.3\ \text{rad/s}$$A single specification cannot fix three unknowns, so a design choice is needed. The standard one is to let a single capacitor dominate and to push the other poles well below the corner, which keeps the roll-off close to a clean single-pole shape.
6. Allocate the budget and solve for the three capacitors. Placing both coupling poles a decade below the specification, at 10 Hz each, leaves 80 Hz for the emitter capacitor:$$C_{C1} = \frac{1}{2\pi(10)(7443)} = 2.14\ \mu\text{F}, \qquad C_{C2} = \frac{1}{2\pi(10)(13000)} = 1.22\ \mu\text{F}$$$$C_{E} = \frac{1}{2\pi(80)(69.56)} = \boxed{28.6\ \mu\text{F}}$$Recombining the three reciprocal time constants returns exactly 100 Hz, as it must.
7. Identify the dominant capacitor. The emitter capacitor supplies 80 per cent of $\omega_L$ against 10 per cent from each coupling capacitor, so the emitter bypass capacitor dominates the corner frequency. The reason is structural rather than a consequence of the allocation: it works into only 69.6 Ω, because the emitter presents $1/g_m$-like impedance rather than a bias resistance, so for any comparable capacitance its pole sits roughly two decades above the others. Even if all three capacitors were made equal, the emitter capacitor would still set $f_L$ almost single-handedly.
8. Specify preferred values and check the outcome. The nearest E12 values are $C_{C1} = 2.2\ \mu\text{F}$, $C_{C2} = 1.2\ \mu\text{F}$ and $C_E = 33\ \mu\text{F}$, which give $f_L = 89.3$ Hz — below the specification, which is the safe side for a lower corner. Rounding the emitter capacitor down instead, to 27 µF, would push the estimate to 105 Hz and violate the specification.
9. Confirm against the exact transfer function. Solving the four-node small-signal circuit with all three capacitors in place gives a midband gain of $40.4$ V/V (32.1 dB), matching the closed form $g_m(R_C\parallel R_L)(R_B\parallel r_{\pi})/[R_S+(R_B\parallel r_{\pi})]$, and an actual −3 dB frequency of 90.1 Hz for the designed capacitors. The short-circuit estimate is therefore about 11 per cent conservative here, which is normal when the poles are not widely separated — it always over-estimates $f_L$, so a design that meets the specification on the estimate meets it in reality as well.