Class B Output Stage — Output Power, Device Dissipation and Efficiency: 22-Elec-B5 Advanced Electronics, December 2019, Q3

Question 3: Class B Output Stage — Output Power, Device Dissipation and Efficiency (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given.

Quantity	Symbol	Value
Supply rails (symmetrical)	$\|V_{CC}\|=\|V_{EE}\|$	20 V
Load	$R_L$	8 Ω
Current gain of each device	$\beta$	50
Base–emitter turn-on voltage	$V_{BE,on}$	0.7 V

Find. The maximum sinusoidal output power delivered to $R_L$, the power each output device dissipates while that maximum is being delivered, and the resulting power-conversion efficiency.

Figure 3.1 — The complementary class B (push–pull) emitter-follower output stage. The npn device $Q_2$ sources current into $R_L$ on positive half-cycles and the pnp device $Q_1$ sinks it on negative half-cycles; each conducts for exactly half a cycle. The question labels the lower device M1; the schematic labels it $Q_1$, and the two are the same transistor.

Approach. Take the peak output as the rail, since the stage is an emitter follower and the drive is assumed ideal, then integrate the half-sine current waveforms over a full cycle to get the supply power and the per-device dissipation; the efficiency is the ratio of the two, and the power balance $P_{S}=P_{L}+2P_{D}$ is a free check on all three answers.

Check — what limits the peak output. With an ideal driver and $V_{CE,sat}$ neglected, the peak output equals the rail, $\hat V_o = V_{CC} = 20$ V, and that is the reading taken for the boxed answers below (it is the textbook maximum-output condition and the one the phrase "maximum RMS output power" selects). If instead the input is clamped to the rail so that the follower loses one $V_{BE,on}$, the peak becomes $\hat V_o = 20-0.7 = 19.3$ V and the answers become $P_L = 23.28$ W, $P_{D}=3.72$ W per device and $\eta = 75.8$ per cent — a 7 per cent change in output power and no change in method. The stated $\beta = 50$ does not enter any of the three answers; it sizes the drive, with a peak base current of $\hat I_B = (\hat V_o/R_L)/(\beta+1) = 2.5/51 = 49.0$ mA that the preceding stage must supply.

Part (a) — find the peak and RMS output quantities. Each device is an emitter follower, so the output tracks the input to within a $V_{BE}$ and the peak output swing is set by the rail: $$\begin{aligned} \hat V_o &= V_{CC} = 20\ \text{V},\\ \hat I_o &= \frac{\hat V_o}{R_L} = \frac{20\ \text{V}}{8\ \Omega} = 2.5\ \text{A}. \end{aligned}$$ For a sinusoid the RMS values are the peaks divided by $\sqrt2$, i.e. $V_{o,rms}=14.14$ V and $I_{o,rms}=1.768$ A.
Evaluate the maximum output power. The load power is the product of the RMS quantities, which is the familiar half-peak-squared form: $$P_L = V_{o,rms}I_{o,rms} = \frac{\hat V_o^2}{2R_L} = \frac{(20\ \text{V})^2}{2\times 8\ \Omega} = \frac{400}{16},$$ $$\boxed{P_{L,\max} = 25.0\ \text{W}}$$
Part (b) — get the supply power first. Each supply delivers current only during its own half-cycle, so each sees a half-wave-rectified sinusoid whose average value is $\hat I_o/\pi$. The total power drawn from the two rails is therefore $$P_S = V_{CC}\frac{\hat I_o}{\pi} + V_{EE}\frac{\hat I_o}{\pi} = \frac{2V_{CC}\hat V_o}{\pi R_L} = \frac{2\times 20\times 20}{\pi\times 8} = 31.83\ \text{W}.$$ Note that the supply power rises only linearly with output amplitude while the load power rises quadratically — the reason class B is inefficient at small signals and efficient at full drive.
Split the difference between the two devices. The stage dissipates whatever the supplies deliver and the load does not take, and by symmetry the two devices share it equally, so $$P_D = \frac{P_S-P_L}{2} = \frac{V_{CC}\hat V_o}{\pi R_L}-\frac{\hat V_o^2}{4R_L} = \frac{20\times 20}{\pi\times 8}-\frac{400}{4\times 8} = 15.92-12.50 ,$$ $$\boxed{P_{D}(Q_1) = 3.42\ \text{W}}$$ This is the dissipation in the device the question calls M1 (the lower, pnp device $Q_1$); $Q_2$ dissipates the same 3.42 W. The power balance closes exactly: $P_S-P_L = 31.83-25.00 = 6.83\ \text{W} = 2\times 3.42$ W.
Part (c) — form the efficiency. The power-conversion efficiency is the load power divided by the power drawn from the supplies: $$\eta = \frac{P_L}{P_S} = \frac{\hat V_o^2/(2R_L)}{2V_{CC}\hat V_o/(\pi R_L)} = \frac{\pi}{4}\,\frac{\hat V_o}{V_{CC}} = \frac{\pi}{4}\times 1 ,$$ $$\boxed{\eta = \frac{\pi}{4} = 78.5\ \text{per cent}}$$ The result is the theoretical class B maximum, reached here because the peak output was taken to be the full rail; any real saturation voltage or lost $V_{BE}$ scales it down by the ratio $\hat V_o/V_{CC}$, as the callout above shows.
Sanity-check the thermal consequence. Worth stating in an exam answer: maximum output is not the worst case for the transistors. Differentiating $P_D=V_{CC}\hat V_o/(\pi R_L)-\hat V_o^2/(4R_L)$ gives a maximum at $\hat V_o = 2V_{CC}/\pi = 12.73$ V, where each device dissipates $V_{CC}^2/(\pi^2 R_L) = 5.07$ W — about 48 per cent more than at full output. A heat sink sized on the 3.42 W figure would be undersized.

Quantity	Symbol	Result
Peak output voltage and current	$\hat V_o$, $\hat I_o$	20 V, 2.5 A
RMS output voltage and current	$V_{o,rms}$, $I_{o,rms}$	14.14 V, 1.768 A
(a) Maximum RMS output power	$P_{L,\max}$	25.0 W
Total power drawn from both supplies	$P_S$	31.83 W
(b) Dissipation in M1 ($Q_1$) at maximum output	$P_D$	3.42 W
(c) Power efficiency	$\eta$	78.5 per cent ($\pi/4$)
Worst-case device dissipation (at $\hat V_o=2V_{CC}/\pi$)	$P_{D,\max}$	5.07 W at 12.73 V peak
Peak base current required from the driver	$\hat I_B$	49.0 mA

Topic. Power, dissipation and efficiency of the complementary class B push–pull output stage.

Key relations. $P_L=\hat V_o^2/(2R_L)$; $P_S = 2V_{CC}\hat V_o/(\pi R_L)$; $P_D = V_{CC}\hat V_o/(\pi R_L)-\hat V_o^2/(4R_L)$ per device; $\eta = (\pi/4)(\hat V_o/V_{CC})$, maximum $\pi/4 = 78.5$ per cent; worst-case dissipation $V_{CC}^2/(\pi^2R_L)$ at $\hat V_o=2V_{CC}/\pi$; power balance $P_S=P_L+2P_D$.

Why this works. In class B each device is biased exactly at cut-off, so it conducts for one half-cycle and is off for the other. The current drawn from each supply is therefore a half-wave-rectified sinusoid, whose average is $\hat I_o/\pi$ rather than the $\hat I_o/2$ a naive split would suggest — and that factor of $\pi$ is where the 78.5 per cent ceiling comes from. Because there is no quiescent current, no power is burned when there is no signal, which is the whole reason the topology is used for audio and motor-drive output stages. The energy accounting is complete: whatever leaves the supplies either reaches the load or heats the transistors, and the fact that the balance closes to the last decimal is the cheapest possible check that all three parts are consistent.

Common pitfall. Quoting $\eta = 78.5$ per cent unconditionally: the efficiency is proportional to the output amplitude, so a stage driven to half its peak swing is only 39 per cent efficient. The second is thermal — assuming that maximum output power means maximum device dissipation, when in fact the worst case occurs at about 64 per cent of peak output. A third is using $\hat I_o/2$ instead of $\hat I_o/\pi$ as the average supply current, which returns a fictitious efficiency of 100 per cent.

Source. Sedra & Smith, Microelectronic Circuits, 8th ed., §11.3 (class B output stage: transfer characteristic, power dissipation, power conversion efficiency); Razavi, Fundamentals of Microelectronics, 2nd ed., §15.3.

Question 3 of 5: Class B Output Stage — Output Power, Device Dissipation and Efficiency

Question 3: Class B Output Stage — Output Power, Device Dissipation and Efficiency (20 marks)