Question 2 of 5: Class-AB Output Stage Enclosed by Two Error Amplifiers

Question 2: Class-AB Output Stage Enclosed by Two Error Amplifiers (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given.

Find. (a) a closed-form expression for $v_{OUT}/v_{IN}$ in terms of $\mu$, $K$, $I_Q$ and $R_L$; (b) the gain the topology is intended to deliver; and (c) how far short of that ideal the finite $\mu$ leaves it.

Approach. Treat the two common-source devices as one transconductor of value $2g_m$ loaded by $R_L$, close the loop through the error amplifiers, and solve the single node equation at the output.

1. Part (a) — get the transconductance of each output device from the quiescent current. With zero input both devices sit in saturation carrying $I_Q$, so their common overdrive follows from the square law $I_Q = \tfrac12 K V_{ov}^2$, giving $V_{ov} = \sqrt{2I_Q/K}$, and the transconductance is $$g_m = K V_{ov} = K\sqrt{\frac{2I_Q}{K}} = \sqrt{2KI_Q}$$ Because $K_n = K_p$ and the thresholds match, both devices have this same $g_m$ — that matching is what the given (i) is for.
2. Recognise that the two devices act in parallel, not in opposition. The PMOS $M_1$ has its source at $+V_{DD}$ and the NMOS $M_2$ has its source at ground; both supplies are a.c. grounds, so each device is a common-source stage whose drain current is controlled by its own gate voltage alone. The two gates are driven by the same error signal, and the two drains are tied to the same node, so their transconductances add: $$g_{m,\text{total}} = g_{m1} + g_{m2} = 2g_m = 2\sqrt{2KI_Q}$$ This doubling is the whole reason a push-pull pair is used, and it is the single most commonly dropped factor in this derivation.
3. Write the node equation at the output. Let $v_G$ be the common gate drive. The current the two devices push into the output node is $-2g_m v_G$, and that current must leave through the load, so $$-2g_m v_G = \frac{v_{OUT}}{R_L}$$ with the error amplifiers supplying $v_G = \mu\,(v_{OUT} - v_{IN})$ as fixed in the callout above.
4. Eliminate the gate drive and collect terms. Substituting and multiplying through by $R_L$, $$-2g_m \mu R_L (v_{OUT} - v_{IN}) = v_{OUT} \quad\Longrightarrow\quad 2\mu g_m R_L\,v_{IN} = v_{OUT}\left(1 + 2\mu g_m R_L\right)$$ so that, writing $T = 2\mu g_m R_L$ for the loop transmission, the closed-loop gain is $$\boxed{\ \frac{v_{OUT}}{v_{IN}} = \frac{T}{1+T} = \frac{2\mu g_m R_L}{1 + 2\mu g_m R_L} = \frac{2\mu R_L\sqrt{2KI_Q}}{1 + 2\mu R_L\sqrt{2KI_Q}}\ }$$ which is the required expression entirely in the given quantities.
5. Read the same result as a source resistance, because that is what the question is really about. Dividing numerator and denominator by $2\mu g_m$, $$\begin{aligned} \frac{v_{OUT}}{v_{IN}} &= \frac{R_L}{R_L + R_{out}} \\[2pt] R_{out} &= \frac{1}{2\mu g_m} \end{aligned}$$ The stage therefore behaves as an ideal unity-gain source behind an output resistance $1/(2\mu g_m)$ — the open-loop value $1/(2g_m)$ divided by $\mu$. This is precisely the “lowered output resistance” the question’s preamble claims for the error amplifiers, and it is worth stating explicitly because it makes parts (b) and (c) immediate.
6. Part (b) — take the ideal limit. As $\mu \to \infty$ the loop transmission $T$ grows without bound, $R_{out} \to 0$, and the expression above tends to $$\lim_{\mu\to\infty} \frac{T}{1+T} = 1 \quad\Longrightarrow\quad \boxed{\left.\frac{v_{OUT}}{v_{IN}}\right|_{\text{expected}} = 1\ \text{V/V}}$$ The expected gain is unity: this is a buffer. The error amplifiers are not there to provide voltage gain but to force the output to track the input, and the class-AB pair is there to supply current the error amplifiers cannot.
7. Part (c) — the gain error is the reciprocal of one plus the loop transmission. Subtracting the actual gain from the ideal unity value, $$\varepsilon_A = 1 - \frac{T}{1+T} = \frac{1}{1+T}$$ so that $$\boxed{\ \varepsilon_A = \frac{1}{1 + 2\mu g_m R_L} = \frac{1}{1 + 2\mu R_L\sqrt{2KI_Q}}\ }$$ Every one of the four given quantities appears where intuition says it should: raising the amplifier gain, the quiescent current, the device $K$ or the load resistance all deepen the feedback and shrink the error, and the dependence on $I_Q$ and $K$ is a square root because they only enter through $g_m$.
8. Put numbers on it, since a symbolic answer alone is hard to sanity-check. Take the illustrative instance $\mu = 100$, $K = 4$ mA/V$^2$, $I_Q = 0.5$ mA and $R_L = 50\ \Omega$. Then $V_{ov} = \sqrt{2(0.5)/4} = 0.5$ V and $g_m = \sqrt{2(4\times10^{-3})(0.5\times10^{-3})} = 2$ mA/V, so $$\begin{aligned} T &= 2(100)(2\times10^{-3})(50) = 20 \\[2pt] \frac{v_{OUT}}{v_{IN}} &= \frac{20}{21} = 0.952 \\[2pt] \varepsilon_A &= \frac{1}{21} = 0.0476 \end{aligned}$$ i.e. a gain error of 4.76 percent and an output resistance of $1/(2 \times 100 \times 2\times10^{-3}) = 2.5\ \Omega$, down from $1/(2g_m) = 250\ \Omega$ without the error amplifiers. A hundred-fold reduction in output resistance for a hundred-fold loop gain is the expected signature, and it confirms the algebra.
9. Check the limiting behaviour before leaving the question. Three sanity tests all pass: the gain is strictly less than one for any finite $\mu$, as a negative feedback buffer must be; the error falls as $1/\mu$ once $T \gg 1$, so a decade more amplifier gain buys a decade less error; and setting $\mu = 1$ (no error amplifiers, gates driven directly) collapses the result to the plain source-follower-like divider $R_L/(R_L + 1/2g_m)$, which for the numbers above would be only 0.167 — a vivid measure of what the feedback is doing.