23-Mechatronics-A2 Circuits and Electronics · December 2018
Question 6 of 11: Second-order RLC switching, Laplace-domain solution
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
Paper: National Exams, December 2018 — 16-Mex-A2 Circuits and Electronics. Closed-book, 3-hour paper (approved Casio/Sharp calculator only). Two parts: Part A — Circuits (Q1–Q6) and Part B — Electronics (Q7–Q11); candidates normally answer 5 of the 11 questions (3+2 or 2+3 split). Full worked solutions to all eleven questions are given below so the set can be used for study regardless of which five a candidate chose.
Reference texts: C. K. Alexander & M. N. O. Sadiku, Fundamentals of Electric Circuits (7th ed.) — resistive networks, superposition, Thévenin/max-power transfer, first-order and second-order transients, AC steady-state nodal analysis; W. H. Hayt et al., Engineering Circuit Analysis (9th ed.) — Laplace-domain circuit models; A. S. Sedra & K. C. Smith, Microelectronic Circuits (8th ed.) — op-amp T-network feedback, diode rectifiers, MOSFET common-gate stages, NMOS inverters, and BJT bias-point analysis.
Reading the figures. The paper supplies the schematics but no separate figure data; every network below is redrawn element-by-element directly from the original drawing (several figures are small hand-style schematics). All node/reference choices and source polarities are stated with the solution. Q11 uses printed variable names (e.g. “VE”) exactly as labelled on the original circuit, even where the labelled terminal is physically the collector in one sub-part — this is called out explicitly where it occurs.
Find. $V_c(0^+)$, $i(0^+)$, the $s$-domain circuit for $t\ge0$, and $V_c(t)$.
Figure-6: series RLC loop selected by a switch between E1=20 V (position a) and E2=10 V (position b), through R=5 Ω, L=2 H, C=¼ F (voltage Vc).
Approach. At true dc steady state a series RLC loop carries zero current (the capacitor blocks dc), so both before and after switching the initial/final currents are found from that fact; then Laplace-transform the post-switch loop, including source terms for the nonzero initial capacitor voltage, and solve the resulting series impedance for $I(s)$ and $V_c(s)$.
Initial conditions. With the switch on a for a long time, the loop is at dc steady state: the inductor is a short and the capacitor is open, so no current can flow in the series loop ($i=0$) and the entire source voltage appears across $C$: $$v_c(0^-)=E_1=20\ \text{V},\qquad i(0^-)=0.$$ Both the capacitor voltage and inductor current are continuous across the switch, so $$v_c(0^+)=\boxed{20\ \text{V}},\qquad i(0^+)=\boxed{0\ \text{A}}.$$
Laplace-domain circuit ($t\ge0$). The loop becomes a series connection of: a step source $E_2/s=10/s$; $R=5\ \Omega$; the inductor as impedance $sL=2s$ (no extra source since $i(0)=0$); the capacitor as impedance $1/(sC)=4/s$ in series with an initial-voltage source $v_c(0)/s=20/s$ (oriented to oppose the assumed loop-current direction, since the capacitor is already charged in that same polarity sense).
Loop current $I(s)$. KVL around the series loop: $$\frac{E_2}{s}=I(s)\Big(R+sL+\frac{1}{sC}\Big)+\frac{v_c(0)}{s}\ \Rightarrow\ I(s)=\frac{E_2-v_c(0)}{s\big(R+sL+\tfrac1{sC}\big)}=\frac{-10}{2s^2+5s+4}.$$
Capacitor voltage $V_c(s)$. $$V_c(s)=\frac{I(s)}{sC}+\frac{v_c(0)}{s}=\frac{20}{s}-\frac{20}{s(s^2+2.5s+2)}.$$ The characteristic roots are $s=-1.25\pm j0.6614$ (underdamped, since $2.5^2<4\times2$).
Inverse Laplace. Partial-fraction/inverse-Laplace of $V_c(s)$ gives $$v_c(t)=10+e^{-1.25t}\big[10\cos(0.6614t)+18.90\sin(0.6614t)\big]\ \text{V},\quad t\ge0,$$ or in amplitude–phase form, $$\boxed{v_c(t)=10+21.38\,e^{-1.25t}\cos(0.6614t-62.11^\circ)\ \text{V}}.$$ Check: at $t=0$, $10+21.38\cos(-62.11^\circ)=10+10.00=20.0\ \text{V}$, matching Step 1; as $t\to\infty$, $v_c\to10\ \text{V}=E_2$, the correct new dc steady state.
