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17-Phys-A5 · May 2018

Question 1 of 6: BJT Current-Mirror Bias Network

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

17-Phys-A5-B, Analog and Digital Electronic Circuits — National Exams, May 2018. 6 questions, marks as shown in the paper's marking scheme (Q1: 15; Q2: 10+10; Q3: 10+10; Q4: 15; Q5: 5+10; Q6: 10+5). Open-book exam; any non-communicating calculator permitted.

Reference texts: A. S. Sedra and K. C. Smith, Microelectronic Circuits, 8th ed. (Sedra-Smith) — used throughout for BJT/MOSFET biasing, current mirrors, op-amp and feedback-amplifier analysis. M. M. Mano and M. D. Ciletti, Digital Design, 6th ed. (Mano-Digital) — used for the CMOS pull-up/pull-down duality construction in Question 6.

Question 1: BJT Current-Mirror Bias Network (15 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. Three matched NPN transistors. $Q_3$: base grounded, collector fed from $+8\text{V}$ through $R_1$, emitter feeds directly into $Q_2$'s collector. $Q_1$ is diode-connected (collector shorted to base) and fed from $+8\text{V}$ through $R_2$; its base node also drives $Q_2$'s base. $Q_1$ and $Q_2$ emitters both return to $-5\text{V}$. $V_{BE}=0.7\text{V}$, $\beta=100$, $R_1=2\text{k}\Omega$, $R_2=3\text{k}\Omega$.

Find. The collector currents $I_{C1}$, $I_{C2}$, $I_{C3}$.

+8 VR1R2Q3Q2Q1-5 V
Fig. 1 — $Q_1$ is diode-connected and mirrors into $Q_2$ (both emitters at $-5\text{V}$); $Q_3$ (grounded base, collector via $R_1$) is a common-base (cascode) device stacked on $Q_2$: its emitter current is exactly $Q_2$'s collector current.

Approach (a). Use $Q_1$'s diode connection to fix the common base-node voltage, find the current $R_2$ delivers to that node, split it between the matched mirror pair including base currents, then follow $Q_3$'s emitter current down to its own collector current.

  1. Fix the base-node voltage from $Q_1$'s diode connection. With $Q_1$'s base shorted to its collector, $V_{BE1}=0.7\text{V}$ across the emitter at $-5\text{V}$: $$V_C = V_{EE} + V_{BE} = -5 + 0.7 = -4.3\text{ V}.$$ This same node is $Q_2$'s base, so $V_{BE2}=0.7\text{V}$ too (matched pair, common base and emitter rails) — the textbook condition for $I_{C1}=I_{C2}$.
  2. Current delivered by $R_2$ into the base node. $$I_{R2} = \frac{V_{CC}-V_C}{R_2} = \frac{8-(-4.3)}{3\text{k}\Omega} = 4.10\text{ mA}.$$ This current supplies $Q_1$'s collector current, $Q_1$'s own base current, and $Q_2$'s base current (all three terminals sit on the same node).
  3. Split it between the matched pair, including both base currents. With $I_{C1}=I_{C2}$ (call it $I_C$) and $I_B=I_C/\beta$ for each transistor, $$I_{R2}=I_{C1}+\underbrace{I_{B1}}_{Q_1\text{ own base}}+\underbrace{I_{B2}}_{Q_2\text{ base}} = I_C\left(1+\frac{2}{\beta}\right).$$ Solving, $$\boxed{I_{C1}=I_{C2}=\frac{I_{R2}}{1+2/\beta}=\frac{4.10\text{ mA}}{1.02}=4.02\text{ mA}}.$$
  4. Follow $Q_3$'s emitter current to $I_{C3}$. $Q_3$'s emitter is the ONLY thing feeding $Q_2$'s collector, so by KCL at that node $I_{E3}=I_{C2}=4.02\text{ mA}$. Since $I_{E3}=I_{C3}(1+1/\beta)$, $$\boxed{I_{C3}=I_{E3}\cdot\frac{\beta}{\beta+1}=4.02\text{ mA}\times\frac{100}{101}=3.98\text{ mA}}.$$
Final results
QuantityResult
$I_{C1}$$4.02\text{ mA}$
$I_{C2}$$4.02\text{ mA}$
$I_{C3}$$3.98\text{ mA}$
Check
Back-substituting gives $V_A$ (collector node of $Q_3$) $\approx 0.040\text{ V}$, only ~40 mV above $Q_3$'s grounded base — $Q_3$ is confirmed forward-active but with very little margin, so the given values put $Q_3$ right at the edge of saturation: any $R_1$ above about $2.01\text{ k}\Omega$ would drive it out of the active region.
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