Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
17-Phys-A5-B — Analog and Digital Electronic Circuits — National Exams, May 2019
3 hours duration. Open book exam. Answer all SIX (6) questions.
Reference texts: A. S. Sedra & K. C. Smith, Microelectronic Circuits, 8th ed. (diode limiting circuits Ch. 4, BJT biasing and common-base amplifiers Ch. 6, MOSFET differential amplifiers and current mirrors Ch. 7–8, frequency response Ch. 9, feedback amplifiers Ch. 10, D/A converters Ch. 17); M. M. Mano & M. D. Ciletti, Digital Design, 6th ed. (Boolean algebra Ch. 2, static CMOS logic gates Ch. 10).
Given. $M_1$ (gate driven by $v_s$) and $M_2$ (gate driven by feedback) share a tail current source $I_{bias}$; $M_1$'s drain, through $R_1$, drives $M_3$'s gate; $M_3$ (PMOS, source at $V_{DD}$) drives the output node $v_o$, loaded by $R_3$ to ground; a resistive divider $R_4$ (from $v_o$) and $R_5$ (to ground) feeds $M_2$'s gate — the feedback path. $M_2$'s own drain, through $R_2$, is a symmetric bias branch that connects nowhere else (no signal role). $g_{m1}=g_{m2}$, $g_{m3}$ independent, all $r_o=\infty$.
Find. $v_o/v_s$, via feedback-amplifier analysis (identify $\beta$, the basic amplifier gain $A$, and close the loop).
Fig. 4 — single-input voltage amplifier with voltage-sampling, series-mixing feedback: $R_4$/$R_5$ sample $v_o$ and return a fraction to $M_2$'s gate.
Approach. Recognize the topology as voltage-series (series–shunt) feedback: the feedback network $R_4$/$R_5$ samples $v_o$ (shunt at the output) and returns $v_f=\beta v_o$ in series with $v_s$ at the gate of $M_2$ (no gate current, so the divider is exact and unloaded). Find $\beta$, then the loaded open-loop gain $A$, then close the loop with $A_{cl}=A/(1+A\beta)$.
Part (a) — feedback factor $\beta$. $M_2$'s gate draws no current, so $R_4$/$R_5$ form an exact, unloaded divider from $v_o$: $$\beta=\frac{v_f}{v_o}=\frac{R_5}{R_4+R_5}$$
Tail-current KCL sets the loop. $I_{bias}$ is ideal (zero AC current), so the small-signal currents leaving $M_1$'s and $M_2$'s sources into the tail must sum to zero: $g_{m1}(v_s-v_{tail})+g_{m2}(v_f-v_{tail})=0$, giving $v_s-v_{tail}=\dfrac{g_{m2}}{g_{m1}+g_{m2}}(v_s-v_f)$ (using $g_{m1}=g_{m2}$, this is $\tfrac12(v_s-v_f)$).
Forward path. $M_1$'s drain: $v_A=-g_{m1}R_1(v_s-v_{tail})$, which drives $M_3$'s gate. $M_3$ (source at AC ground) delivers $-g_{m3}v_A$ into $v_o$, which splits between $R_3$ and the $R_4+R_5$ branch (unloaded by $M_2$'s gate): $$-g_{m3}v_A = \frac{v_o}{R_3}+\frac{v_o-v_f}{R_4} = v_o\left(\frac1{R_3}+\frac{1-\beta}{R_4}\right)=v_o\left(\frac1{R_3}+\frac1{R_4+R_5}\right)$$ since $1-\beta=R_4/(R_4+R_5)$ — i.e. the output "sees" $R_3\parallel(R_4+R_5)$.
Assemble $A$ and close the loop. Combining the three steps (with $g_{m1}=g_{m2}$, so the tail split is exactly $\tfrac12$): $$A \equiv \left.\frac{v_o}{v_s}\right|_{\text{open, loaded}} = \frac{g_{m1}g_{m2}g_{m3}R_1\left[R_3\parallel(R_4+R_5)\right]}{g_{m1}+g_{m2}}$$ $$\boxed{\begin{aligned} \frac{v_o}{v_s}&=\frac{A}{1+A\beta} \\ A&=\frac{g_{m1}g_{m2}g_{m3}R_1\left[R_3\parallel(R_4+R_5)\right]}{g_{m1}+g_{m2}},\ \ \beta=\frac{R_5}{R_4+R_5} \end{aligned}}$$
