17-Phys-A5, Undated paper, Q5

Question 5 (15 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. Standard 3-bit R-2R ladder ($S_0$=LSB terminated end, $S_2$=MSB adjacent to the summing node), each switch tying its $2R$ leg to $V_{REF}$ (bit=1) or ground (bit=0); ladder output feeds a first inverting op-amp (input from the ladder, feedback $R$), whose output feeds a second inverting unity-gain stage (input resistor $R$, feedback $R$) producing $V_o$. $R=10\,\text{k}\Omega$, $V_{REF}=5\,\text{V}$ for part (b).

Find. (a) $V_o$ as a function of $b_2b_1b_0=S_2S_1S_0$. (b) $V_o$ for $S_2S_1S_0=101$.

Fig. 5 — 3-bit R-2R ladder DAC into a first inverting summing stage, followed by a second inverting unity-gain stage that restores the true sign.

Approach. Use the standard R-2R ladder result (Thevenin resistance $R$ at the summing node, regardless of switch state) to get the first stage's inverted, binary-weighted output, then apply the second stage's fixed $-R/R=-1$ gain.

First stage (R-2R ladder + inverting summer). A standard R-2R ladder presents Thevenin resistance $R$ at the summing node for any switch pattern, with open-circuit voltage $V_{REF}(4b_2+2b_1+b_0)/8$. Since the op-amp's minus input is a virtual ground, that Thevenin voltage drives the full current $I=V_{oc}/R$ into the summing node, which the feedback $R$ must supply: $$V_1 = -V_{oc} = -V_{REF}\frac{4b_2+2b_1+b_0}{8}$$
Second stage (unity-gain inverter). Input resistor $R$, feedback $R$: gain $=-R/R=-1$, so $$\boxed{V_o = -V_1 = V_{REF}\,\frac{4b_2+2b_1+b_0}{8}}$$ — the second stage exists precisely to undo the first stage's sign inversion, giving a true (non-inverting) positive-logic DAC output.
Part (b) — numeric. $S_2S_1S_0=101\Rightarrow b_2=1,\,b_1=0,\,b_0=1$: $$V_o = 5\,\text{V}\times\frac{4(1)+2(0)+1}{8}=5\times\frac{5}{8}=\boxed{3.125\,\text{V}}$$

Quantity	Value
$V_o$ (symbolic)	$V_{REF}(4b_2+2b_1+b_0)/8$
$V_o$ for $S_2S_1S_0=101$	3.125 V

Concept & Theory

Topic: R-2R ladder digital-to-analog converter.

Key relations: R-2R ladder Thevenin resistance $=R$ at every node, independent of switch state; binary-weighted open-circuit voltage $V_{REF}\sum b_i 2^i/2^N$; inverting op-amp summer $V_1=-I_{in}R_f$.

Why this works: the R-2R ladder's recursive structure ($2R\parallel 2R=R$ at every rung) makes the Thevenin resistance looking into the ladder identical at every node, which is what lets each bit contribute a clean binary-weighted fraction of $V_{REF}$ regardless of the other bits' switch positions.

Common pitfall: stopping after the first (inverting) stage and reporting a negative $V_o$, missing that the second unity-gain inverter restores the sign; or mis-assigning which switch is the MSB vs. LSB in the ladder.

Source: Sedra & Smith, Microelectronic Circuits, Ch. 17 (D/A conversion, R-2R ladder networks).

Question 5 of 6

Question 5 (15 marks)