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98-Phys-A5 · May 2017

Question 4 of 7

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

Notes on this paper

98-Phys-A5 — Semiconductor Devices & Circuits — National Exams, May 2017
3 hours duration. Closed book exam (useful constants, equations and device models are annexed to the exam paper). Any FIVE (5) of the SEVEN (7) questions constitute a complete exam paper; all seven are answered here as a complete study resource.

Reference texts: A. S. Sedra & K. C. Smith, Microelectronic Circuits, 8th ed. (semiconductor/diode physics Ch. 3–4, op-amp and active-filter circuits Ch. 2 & 12, MOSFET small-signal amplifiers Ch. 7, data converters Ch. 17, precision rectifiers Ch. 4); M. M. Mano & M. D. Ciletti, Digital Design, 6th ed. (CMOS logic-family gates Ch. 10); C. Kittel, Introduction to Solid State Physics, 8th ed. (semiconductor carrier transport and statistics Ch. 8).

Question 4 (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. A MOSFET common-source stage (Figure P4) biased at $I_D=1\,\text{mA}$, $V_{DS}=10\,\text{V}$, $V_{GS}=1\,\text{V}$, with $g_m=4\,\text{mA/V}$, $r_o=500\,\text{k}\Omega$.

SymbolValue
$V_{DD}$20 V
$R_D$, $R_L$5 kΩ each
$R_S$5 kΩ
$R_{sig}$1 kΩ
$C_i$0.1 µF
$C_S$100 µF
$C_o$0.01 µF
$\omega_H$90 krad/s

Find. (a) role of $C_S$; (b) $R_{out}$; (c) $R_1$, $R_2$; (d) $A_{vm}=v_o/v_{sig}$; (e) amplifier bandwidth.

vsig Rsig = 1 kΩ GRin = R1∥R2 = 420 kΩ + vgs− Dgmvgs ro500k RD5k RL5k vo S (source AC-grounded by CS) ← Rout = ro∥RD
Figure — midband small-signal equivalent circuit (all coupling/bypass capacitors replaced by short circuits): $R_{out}$ is the resistance looking left into the drain node before $C_o$.

Approach. (b) at midband every capacitor is a short, so $R_{out}$ is just what the $R_L$ branch sees looking back into the drain: $R_D\Vert r_o$. (c) the DC gate voltage from the $R_1$/$R_2$ divider must equal $V_{GS}+I_DR_S$, while $R_1\Vert R_2=R_{in}$. (d) with all capacitors shorted, $A_{vm}$ is the input-divider attenuation times $-g_m$ times the total drain-side parallel resistance. (e) find the dominant low-frequency pole among $\omega_{p1},\omega_{p2},\omega_{p3}$ (using the now-given $C_i$, $C_o$) and combine with the given $\omega_H$ to get the amplifier's overall passband.

  1. Part (a) — role of $C_S$. $C_S$ is a bypass capacitor across the source resistor $R_S$. At DC, $R_S$ is left in the circuit to set the bias point (it sets $V_S=I_DR_S$, part of the gate-voltage design in part (c)). At signal frequencies, $C_S$ AC-shorts $R_S$ to ground, removing the source-degeneration gain loss that $R_S$ would otherwise cause — so the circuit gets DC bias stability from $R_S$ without sacrificing AC gain.
  2. Part (b) — $R_{out}$. Looking back into the drain node from $R_L$ (figure above) with $v_{sig}=0$, the dependent source $g_mv_{gs}$ contributes zero current (its controlling $v_{gs}=0$), leaving only $R_D$ and $r_o$ in parallel: $$R_{out}=R_D\Vert r_o=\frac{(5\,\text{k})(500\,\text{k})}{5\,\text{k}+500\,\text{k}}=\boxed{4.95\ \text{k}\Omega}$$
  3. Part (c) — $R_1$, $R_2$. The DC source voltage is $V_S=I_DR_S=(1\,\text{mA})(5\,\text{k}\Omega)=5\,\text{V}$, so the required gate voltage is $V_G=V_{GS}+V_S=1+5=6\,\text{V}$. With $V_G=V_{DD}\dfrac{R_2}{R_1+R_2}$ and $R_1\Vert R_2=420\,\text{k}\Omega$: $$\frac{R_2}{R_1+R_2}=\frac{6}{20}=0.30\qquad R_1\Vert R_2=0.30(0.70)(R_1+R_2)=420\,\text{k}\Omega\ \Rightarrow\ R_1+R_2=2\,\text{M}\Omega$$ $$R_1=0.70(2\,\text{M}\Omega)=\boxed{1.4\ \text{M}\Omega}\qquad R_2=0.30(2\,\text{M}\Omega)=\boxed{600\ \text{k}\Omega}$$ (Check: $R_1\Vert R_2=420\,\text{k}\Omega$; $V_G=20(600\text{k}/2\text{M})=6\,\text{V}$. ✓)
  4. Part (d) — midband gain $A_{vm}=v_o/v_{sig}$. At midband all capacitors are shorts, so $v_{gs}$ equals the gate voltage and the drain sees $R_D\Vert R_L\Vert r_o$: $$R_D\Vert R_L\Vert r_o=\frac{1}{\frac{1}{5\text{k}}+\frac{1}{5\text{k}}+\frac{1}{500\text{k}}}=2487.6\ \Omega$$ The signal first divides down at the gate through $R_{sig}=1\,\text{k}\Omega$ and $R_{in}=420\,\text{k}\Omega$ (gate draws no current): $$A_{vm}=\frac{R_{in}}{R_{in}+R_{sig}}\times\big(-g_m(R_D\Vert R_L\Vert r_o)\big)=\frac{420}{421}\times\big(-4\times10^{-3}\times2487.6\big)=(0.99762)(-9.950)=\boxed{-9.93\ \text{V/V}}$$
  5. Part (e) — bandwidth. With $R_1,R_2$ from part (c) and the given capacitor values, the three low-frequency break frequencies are $$\omega_{p1}=\frac{1}{(R_{sig}+R_{in})C_i}=\frac{1}{(421\,\text{k})(0.1\,\mu\text{F})}=23.8\ \text{rad/s}\qquad\omega_{p2}=\frac{1}{\left(R_S\Vert\frac{1}{g_m}\right)C_S}=\frac{1}{(238.1\,\Omega)(100\,\mu\text{F})}=42.0\ \text{rad/s}$$ $$\omega_{p3}=\frac{1}{(R_{out}+R_L)C_o}=\frac{1}{(9.95\,\text{k}\Omega)(0.01\,\mu\text{F})}=10{,}050\ \text{rad/s}$$ $\omega_{p3}$ is roughly 240–420× larger than $\omega_{p1}$ and $\omega_{p2}$, so it alone dominates and sets the amplifier's lower cutoff, $\omega_L\approx\omega_{p3}=10{,}050\,\text{rad/s}$. With the given upper cutoff $\omega_H=90{,}000\,\text{rad/s}$, the passband (bandwidth) is $$BW=\omega_H-\omega_L=90{,}000-10{,}050=\boxed{79{,}950\ \text{rad/s}\approx80\ \text{krad/s}}$$ or in Hz: $f_H=14.32\,\text{kHz}$, $f_L=1.60\,\text{kHz}$, $BW\approx\boxed{12.7\ \text{kHz}}$.
QuantityValue
$R_{out}$4.95 kΩ
$R_1$, $R_2$1.4 MΩ, 600 kΩ
$A_{vm}=v_o/v_{sig}$−9.93 V/V
Dominant low-freq pole $\omega_{p3}$10,050 rad/s
Bandwidth≈79.95 krad/s (12.7 kHz)