Question 1 of 7: Current-Source-Driven Full-Wave Bridge Rectifier
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
17-Comp-A1, Electronics — National Exams, undated sitting (page 1 of the paper reads "May 2018" while every question page reads "May 2019", so the exam period is uncertain). Open-book, 3 hours; the paper's own instructions read "FIVE (5) questions constitute a complete exam paper" while seven distinct 20-mark questions are printed — all seven are answered below as a complete study resource. Where a diode is used without a stated drop, $V_D=0.7\text{V}$.
Reference texts: Sedra & Smith, Microelectronic Circuits (diode rectifiers/limiters, BJT and MOSFET biasing and small-signal amplifiers, op-amp limiting circuits, CMOS logic gate sizing, R-2R ladder D/A converters) — the single reference text covering every question on this paper.
Given. A current source $I_s(t)=10\sin(2\pi ft)\text{ mA}$, $f=1\text{kHz}$, feeds node $V_a$. Two resistors, each $R=10\text{k}\Omega$, sit in parallel between $V_a$ and ground. Node $V_a$ also drives the AC terminals of a full-wave diode bridge (4 diodes, $V_F=0.7\text{V}$ each) whose DC output is taken across $R_L=5\text{k}\Omega$, labelled $V_o$.
Find. $V_a(t)$ and $V_o(t)$ with peaks; the diode reverse-voltage rating; the maximum average power rating for the load resistor; $I_s(t)$ with peaks.
Solved below for $R_L$ (the resistor whose dissipation is the natural design question, since it is the load actually delivering rectified power), with the two shunt resistors' dissipation given alongside for completeness.
Approach. Collapse the two parallel $10\text{k}\Omega$ resistors to $R_{par}=5\text{k}\Omega$. While $|V_a|$ is below the bridge's two-diode turn-on threshold the bridge is an open circuit and $V_a=I_s\cdot R_{par}$; once $|V_a|$ exceeds that threshold, the conducting diode pair adds a $1.4\text{V}$-offset $R_L$ path in parallel with $R_{par}$, and node KCL gives a linear relation between $V_a$ and $I_s$ that holds for the rest of each half-cycle.
Turn-on threshold and node equation. The bridge conducts once $|V_a|>2V_F=1.4\text{V}$, i.e. once $|I_s|>1.4\text{V}/R_{par}=0.28\text{mA}$ — at a 10mA peak this is a sliver near each zero-crossing, negligible for the sketch. Above threshold, KCL at node $V_a$ (taking the positive half; negative is symmetric) gives
$$I_s=\frac{V_a}{R_{par}}+\frac{V_a-2V_F}{R_L}$$
Since $R_{par}=R_L=5\text{k}\Omega$, this reduces to $2V_a=2V_F+I_s R_{par}$, i.e.
$$\boxed{V_a=V_F+\tfrac12 R_{par}\,I_s=0.7+2.5\,I_s\ \ (I_s\text{ in mA, }V_a\text{ in V})}$$
Peak values. At $I_s=10\text{mA}$ (peak): $V_{a,\text{peak}}=0.7+2.5(10)=\boxed{25.7\text{ V}}$, and $V_{o,\text{peak}}=V_{a,\text{peak}}-2V_F=25.7-1.4=\boxed{24.3\text{ V}}$. By symmetry the negative half of $I_s$ produces $V_a=-25.7\text{V}$ but the SAME $V_o=+24.3\text{V}$ peak (full-wave rectification), with $V_o$ dipping to (near) zero at each zero-crossing dead-zone. See Fig. Q1-a.
Part (b) — reverse voltage rating. In a full bridge, the two OFF diodes each see a reverse voltage equal to the DC output plus one forward drop: $V_{\text{rev}}=V_o+V_F$. At the peak, $V_{\text{rev}}=24.3+0.7=\boxed{25.0\text{ V}}$. Choosing a standard part with a healthy margin (e.g. a 1N4004-class diode rated 50V PIV, roughly $2\times$ this worst case) is a safe, standard choice.
Part (c) — resistor power rating. $V_o(t)$ is a piecewise (dead-zone + clamp-shifted) rectified sine, so its average power is found by numerically integrating $V_o(t)^2/R_L$ over one period: $P_{avg,R_L}\approx\boxed{58.1\text{ mW}}$. A standard $\tfrac14\text{W}$ (250mW) resistor gives over $4\times$ margin. If "this resistor" instead means one of the two $10\text{k}\Omega$ shunt resistors, each dissipates $P_{avg,R}=\tfrac12\cdot\overline{V_a^2/R_{par}}\approx\boxed{33.5\text{ mW}}$ (they split the shared $V_a^2/R_{par}$ power equally by symmetry) — a $\tfrac14\text{W}$ part clears this case too.
Part (d) — $I_s(t)$. $I_s(t)$ is given directly as $10\sin(2\pi ft)\text{ mA}$: a $1\text{kHz}$ ($T=1\text{ms}$) sine of peak $\pm10\text{mA}$, in phase with $V_a$'s driving waveform (see Fig. Q1-d).
Fig. Q1-a — $V_a(t)$ (blue, $\pm25.7\text{V}$) vs full-wave $V_o(t)$ (orange, peak $24.3\text{V}$, brief dead-zone dip to 0 at each zero-crossing).
Fig. Q1-d — $I_s(t)$, the given drive waveform: a $1\text{kHz}$ sine of peak $\pm10\text{mA}$.
Final Results — Question 1
Quantity
Value
$V_a$ peak
$\pm25.7\text{V}$
$V_o$ peak
$24.3\text{V}$ (both half-cycles)
Diode reverse-voltage rating
$\ge25.0\text{V}$ worst case; choose $\ge50\text{V}$ PIV part