Question 2 of 7: MOSFET Common-Gate Amplifier (Current-Source Biased)

Question 2: MOSFET Common-Gate Amplifier (Current-Source Biased) (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. $I=500\,\mu\text{A}$ (fixed by the current source, so $I_D=500\,\mu\text{A}$); $k_n'(W/L)=1\text{mA/V}^2$; $|V_t|=1.5\text{V}$; $V_A=75\text{V}$; $R_G=2.2\text{M}\Omega$ (gate bias, carries no gate current); $R_D=5\text{k}\Omega$; $R_L=10\text{k}\Omega$; $R_s=50\,\Omega$ (source resistance of $V_s$); supplies $+5\text{V}/-5\text{V}$.

Find. $V_D$, $V_G$, $V_{GS}$; small-signal model ($g_m$, $r_o$); $R_i$, $R_o$; open-circuit and loaded voltage gain.

Approach. The gate carries no DC (or AC) current, so $R_G$ simply pins $V_G=0\text{V}$ with no loading effect; $V_s$ drives the source terminal (common-gate stage), and $I$ fixes $I_D=500\,\mu\text{A}$ regardless of supply drift. DC bias comes from $I_D=\tfrac12k_n'(W/L)(V_{GS}-V_t)^2$ and $V_D=V_{DD}-I_DR_D$; the small-signal model uses the standard common-gate result with $r_o$ included, since $R_D$ is not negligible compared to $r_o$.

1. Part (a) — DC operating point. $V_G=0\text{V}$ exactly (no current in $R_G$). Solving the square-law equation for the overdrive: $$500\,\mu\text{A}=\tfrac12(1\text{mA/V}^2)(V_{GS}-1.5)^2\;\Longrightarrow\;V_{ov}=V_{GS}-V_t=\sqrt{\frac{2(500\mu)}{1\text{m}}}=\boxed{1.0\text{ V}}$$ $$V_{GS}=1.5+1.0=\boxed{2.5\text{ V}},\qquad V_D=5-(500\,\mu\text{A})(5\text{k}\Omega)=\boxed{2.5\text{ V}}$$ (Since $V_S=V_G-V_{GS}=0-2.5=-2.5\text{V}$, $V_{DS}=2.5-(-2.5)=5\text{V}>V_{ov}=1\text{V}$, confirming saturation.)
2. Part (b) — small-signal model. $$g_m=k_n'(W/L)\,V_{ov}=(1\text{mA/V}^2)(1.0\text{V})=\boxed{1.0\text{ mA/V}},\qquad r_o=\frac{V_A}{I_D}=\frac{75}{500\,\mu\text{A}}=\boxed{150\text{ k}\Omega}$$ Since $V_G$ is AC ground (no signal reaches the gate through $R_G$, and the MOSFET gate itself draws none), the small-signal model is the standard common-gate stage: $v_i=v_s$ drives the source through $R_s$; the device appears between source and drain as $r_o$ in parallel with the dependent source $g_mv_{gs}=-g_mv_s$ (since $v_{gs}=0-v_s$); the drain node is loaded by $R_D\parallel R_L$ ($C_1$ an ideal short).
3. Part (c) — $R_i$, $R_o$. Using the standard common-gate result with $r_o$ (derived here by nodal analysis), with $R_D$ alone as the amplifier's own drain load (loading by $R_L$ is treated separately in Part (d)): $$R_i=\frac{r_o+R_D}{1+g_mr_o}=\frac{150\text{k}+5\text{k}}{1+(1\text{mA/V})(150\text{k})}=\frac{155\text{k}}{151}=\boxed{1.03\text{ k}\Omega}$$ Looking into the drain (transistor alone, with the $50\,\Omega$ source resistance boosting it via the same $(1+g_mr_o)$ factor): $$R_{o,\text{transistor}}=r_o+(1+g_mr_o)R_s=150\text{k}+(151)(50)=\boxed{157.6\text{ k}\Omega}$$ In parallel with $R_D$ (always present at the drain node), the amplifier's total output resistance seen by any external load is $$R_o=R_D\parallel R_{o,\text{transistor}}=5\text{k}\parallel157.6\text{k}=\boxed{4.85\text{ k}\Omega}$$
4. Part (d) — open-circuit and loaded gain. With $R_L$ removed (open circuit), only $R_D$ loads the drain: $$A_{v,\text{oc}}=\boxed{4.64\text{ V/V}}$$ a modest, non-inverting gain typical of a common-gate stage (unlike the common-source/common-emitter stages of Questions 4/5, common-gate does not invert). Connecting $R_L=10\text{k}\Omega$ at the output divides this down by the output-resistance loading factor: $$A_{v,\text{ld}}=A_{v,\text{oc}}\times\frac{R_L}{R_L+R_o}=4.64\times\frac{10}{10+4.85}=\boxed{3.13\text{ V/V}}$$ (confirmed directly by re-solving the nodal equations with $R_D\parallel R_L$ at the drain, giving the same $3.13\text{V/V}$.)