Question 3 of 7: Active Low-Pass Filter with Input Offset
Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)
Notes on this paper
98-Comp-A1, Electronics — National Exams, December 2017. Open-book, 3 hours; the paper's own NOTES/marking-scheme block states "FIVE (5) questions constitute a complete exam paper: the first 5 questions as they appear in the answer book will be marked," but all seven 20-mark questions are answered below as a complete study resource (per the standing "answer all M" rule). Unless stated otherwise, diode drops $V_D=0.7\text{V}$.
Reference texts: Sedra & Smith, Microelectronic Circuits (diode limiters, MOSFET common-gate amplifiers, active-RC matched-feedback filters and offset, BJT common-emitter amplifiers with current-source biasing, RC-ladder sinusoidal oscillators, CMOS static logic sizing, charge-redistribution SAR ADCs) — the single reference text covering every question on this paper.
Question 3: Active Low-Pass Filter with Input Offset (20 marks)
Given. $R_1=10\text{k}\Omega$; $R_F=1\text{M}\Omega$; $C_F=0.1\,\mu\text{F}$; $V_{os}=10\text{mV}$ (in series with the grounded non-inverting input); op-amp output saturates at $\pm10\text{V}$.
Given data
Quantity
Value
$R_1$
$10\,\text{k}\Omega$
$R_F$
$1\,\text{M}\Omega$
$C_F$
$0.1\,\mu\text{F}$
$V_{os}$
$10$ mV
Saturation
$\pm10$ V
Find. DC gain; AC gain expression; $3\text{dB}$ frequency and unity-gain bandwidth; effect of $V_{os}$ on output swing.
Approach. $C_F$ is open at DC (giving the plain resistive inverting gain) and shorts $R_F$ at high frequency, making this a single-pole active low-pass; the input offset is amplified by the circuit's own noise gain $(1+R_F/R_1)$ and appears as a fixed DC shift at the output, eating into the available symmetric swing before saturation.
Part (a) — DC gain. At DC, $C_F$ is an open circuit, leaving the plain resistive feedback ratio:
$$A_{DC}=-\frac{R_F}{R_1}=-\frac{1\text{M}\Omega}{10\text{k}\Omega}=\boxed{-100\text{ V/V}}$$
Part (b) — AC gain. The feedback impedance is $Z_F(s)=R_F\parallel\dfrac{1}{sC_F}=\dfrac{R_F}{1+sR_FC_F}$, giving
$$A(s)=-\frac{Z_F(s)}{R_1}=\boxed{\dfrac{-100}{1+sR_FC_F}}=\dfrac{-100}{1+j(f/1.59\text{Hz})}$$
a single real pole (no zero) — the classic active low-pass (lossy-integrator) response.
Part (c) — $3\text{dB}$ frequency and unity-gain bandwidth.
$$f_{3\text{dB}}=\frac{1}{2\pi R_FC_F}=\frac{1}{2\pi(1\text{M}\Omega)(0.1\,\mu\text{F})}=\boxed{1.59\text{ Hz}}$$
Above $f_{3\text{dB}}$ the response rolls off at $-20\text{dB/decade}$; since the DC gain is $100\times$ ($40\text{dB}$), the roll-off crosses $0\text{dB}$ (unity gain) a factor of $100$ higher in frequency (equivalently $f_u=1/(2\pi R_1C_F)$):
$$f_u=|A_{DC}|\times f_{3\text{dB}}=100\times1.59=\boxed{159\text{ Hz}}$$
(Fig. Q3(c): flat at $40\text{dB}$ up to $1.59\text{Hz}$, then a straight $-20\text{dB/decade}$ line crossing $0\text{dB}$ at $159\text{Hz}$.)
Part (d) — effect of input offset on output swing. $V_{os}$ sits at the non-inverting input, so it is amplified by the circuit's full non-inverting (\"noise\") gain, not the signal gain:
$$V_{o,\text{offset}}=V_{os}\left(1+\frac{R_F}{R_1}\right)=(10\text{mV})(1+100)=\boxed{1.01\text{ V}}$$
This appears as a fixed DC shift added to whatever the signal produces at the output. Since the amplifier still saturates at $\pm10\text{V}$, the room left for the AC signal on the constraining (offset) side shrinks from the ideal $10\text{V}$ to
$$10\text{V}-1.01\text{V}=\boxed{8.99\text{ V}}$$
i.e. the maximum symmetric undistorted output swing is reduced by about $1\text{V}$ (from $\pm10\text{V}$ to effectively $\pm8.99\text{V}$) purely because of the amplified offset — even with zero input signal, the output already sits at $+1.01\text{V}$ (or $-1.01\text{V}$, depending on $V_{os}$'s sign) instead of $0\text{V}$.
Fig. Q3(c) — Bode magnitude sketch: flat at $40\text{dB}$ ($-100\text{V/V}$) up to $f_{3\text{dB}}=1.59\text{Hz}$, then $-20\text{dB/decade}$ crossing unity gain at $f_u=159\text{Hz}$.
