Question 7 of 7: Charge-Redistribution Successive-Approximation ADC

Question 7: Charge-Redistribution Successive-Approximation ADC (20 marks)

Question text not reproduced: the examination questions are © Engineers and Geoscientists BC. Open the official past paper (linked at the top of this page) to read the question, then follow the worked solution below.

Given. Capacitor array $C,\,C/2,\,C/4,\,C/8,\,C/16,\,C/16$ (total $\Sigma C_i=2C$); $V_{ref}=4\text{V}$; sampling phase: $V_x$ held at $0\text{V}$ ($S_B$ closed), all bottom plates at $V_A$.

Find. $V_x$ just after $t=0$; the change in $V_x$ when $S_5$ tests $V_{ref}$; full-scale voltage and resolution using $S_1$-$S_5$; the final switch states for $V_A=1.5\text{V}$.

Approach. The top-plate node is isolated (floating) the instant $S_B$ opens, so total charge on that node is conserved across every subsequent switch change; each bottom-plate switch flip from ground to $V_{ref}$ (holding the rest fixed) shifts $V_x$ by exactly $(C_i/2C)\,V_{ref}$ — the standard capacitor-DAC step formula — letting the comparator's sign at each step run a textbook binary search on $V_A$.

1. Part (a) — $V_x$ just after $t=0$. Before $t=0$: each cap's charge is $Q_i=C_i(0-V_A)=-C_iV_A$ (top plate at $0$, bottom at $V_A$); total $Q=-2C\,V_A$. Immediately after $t=0$ (top plate floating, all bottom plates grounded): $Q_i'=C_i(V_x'-0)=C_iV_x'$; total $Q'=2C\,V_x'$. Charge conservation ($Q=Q'$, since the node is isolated) gives $$-2C\,V_A=2C\,V_x'\;\Longrightarrow\;\boxed{V_x=-V_A}$$
2. Part (b) — change in $V_x$ when $S_5$ tests $V_{ref}$. Only the $C/16$ ($S_5$) capacitor's bottom plate moves from $0$ to $V_{ref}$, all others stay at $0$; by the same charge-conservation argument (or directly by the capacitor-DAC step formula $\Delta V_x=(C_i/\Sigma C)\,V_{ref}$): $$\Delta V_x=\frac{C/16}{2C}\times V_{ref}=\frac{4}{32}=\boxed{0.125\text{ V}}$$ (independent of $V_A$ — this is the smallest usable step, i.e. the converter's $1$ LSB.)
3. Part (c) — full scale and resolution. Only $S_1$-$S_5$ are used as conversion bits (the second $C/16$, $S_T$, stays permanently grounded — it exists purely to make the array sum to a clean $2C$, a standard charge-redistribution DAC trick). Their weights, as a fraction of $V_{ref}$, are $\tfrac12,\tfrac14,\tfrac18,\tfrac{1}{16},\tfrac{1}{32}$: $$V_{FS}=\left(\frac12+\frac14+\frac18+\frac1{16}+\frac1{32}\right)V_{ref}=\frac{31}{32}(4)=\boxed{3.875\text{ V}}$$ $$\text{Resolution (1 LSB)}=\frac{1}{32}\,V_{ref}=\frac{4}{32}=\boxed{0.125\text{ V}}$$ (matching Part (b)'s step exactly, since $S_5$ is the LSB.)
4. Part (d) — $V_A=1.5\text{V}$, final switch states. Standard successive approximation: starting from $V_x=-V_A=-1.5\text{V}$, test each bit MSB-first, keeping it connected to $V_{ref}$ only if the running total stays $\le V_A$:

The running total after $S_2,S_3$ is exactly $1.0+0.5=1.5\text{V}=V_A$, so the conversion is exact: