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22-Elec-A4 Digital Systems and Computers: Undated paper

Nivaar worked solution (AI-drafted; not reviewed by a licensed engineer)

  1. Question 1 K-map minimisation and hazards (12 pts)
  2. Question 2 Synchronous up/down counter with JK flip-flops (12 pts)
  3. Question 3 Multi-output logic and PLA implementation (12 pts)
  4. Question 4 Analysis of an RS + T flip-flop circuit (12 pts)
  5. Question 5 HC11 memory-mapped I/O routing (12 pts)
  6. Question 6 64 KB memory from 16K×4 modules (12 pts)

Start with Question 1 →

Paper format. National Exams, 22-Elec-A4 — Digital Systems and Computers. Closed book; non-programmable calculator permitted; 3 hours. Six questions, each worth 12 points; “any five constitute a complete paper,” so all six are solved here as a study resource.

Reference texts. M. M. Mano & M. D. Ciletti, Digital Design, 5th/6th ed. (Pearson) — K-maps, hazards, PLA/PAL, flip-flop excitation and synchronous-counter design (ch. 3–6); J. F. Wakerly, Digital Design: Principles and Practices (static hazards, memory decoding); Motorola/Freescale M68HC11 Reference Manual (address decoding and memory-mapped I/O for Q5). Boolean identities and the flip-flop excitation tables printed on the exam cover sheet are used throughout.

Note on the figures. Where a single wire or junction in the Q4 figure is genuinely ambiguous, the reading used is stated and the alternative is flagged in a check callout, per the exam’s own instruction to “submit a clear statement of any assumptions made.”